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Uwe Hermann0120e1a2007-09-16 18:11:03 +00001/*
Uwe Hermannafe83092007-09-28 15:45:43 +00002 * This file is part of the superiotool project.
Uwe Hermann0120e1a2007-09-16 18:11:03 +00003 *
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
Uwe Hermannebb73f22008-11-12 19:08:58 +00005 * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
Uwe Hermann0120e1a2007-09-16 18:11:03 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include "superiotool.h"
23
Uwe Hermann07024692007-09-20 22:13:48 +000024#define DEVICE_ID_BYTE1_REG 0x20
25#define DEVICE_ID_BYTE2_REG 0x21
Uwe Hermann945045b2007-09-28 15:39:10 +000026
Uwe Hermann07024692007-09-20 22:13:48 +000027#define VENDOR_ID_BYTE1_REG 0x23
28#define VENDOR_ID_BYTE2_REG 0x24
29
Uwe Hermann6b4ad432007-09-23 13:17:29 +000030#define FINTEK_VENDOR_ID 0x3419
31
Uwe Hermann246be7d2007-10-31 22:22:11 +000032static const struct superio_registers reg_table[] = {
Uwe Hermannebb73f22008-11-12 19:08:58 +000033 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
Arjan Koers78fdd602009-06-26 15:16:21 +000034 /* We assume reserved bits are read as 0. */
35 {NOLDN, NULL,
36 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
37 0x2b,0x2c,0x2d,EOT},
38 {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
39 0x00,0x00,0x08,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000040 {0x0, "Floppy",
Arjan Koers78fdd602009-06-26 15:16:21 +000041 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
42 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000043 {0x1, "COM1",
Arjan Koers78fdd602009-06-26 15:16:21 +000044 {0x30,0x60,0x61,0x70,0xf0,EOT},
45 {0x01,0x03,0xf8,0x04,0x00,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000046 {0x2, "COM2",
Arjan Koers78fdd602009-06-26 15:16:21 +000047 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
48 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
49 {0x3, "Parallel port",
50 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
51 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
52 {0x4, "Hardware monitor",
53 {0x30,0x60,0x61,0x70,EOT},
54 {0x01,0x02,0x95,0x00,EOT}},
55 {0x5, "Keyboard",
56 {0x30,0x60,0x61,0x70,0x72,EOT},
57 {0x01,0x00,0x60,0x00,0x00,EOT}},
58 {0x6, "GPIO",
59 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
60 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
61 EOT},
62 {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
63 NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
64 EOT}},
65 {0x7, "VID",
66 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
67 0xf7,EOT},
68 {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
69 0x00,EOT}},
70 {0x8, "SPI",
71 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
72 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
73 {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
74 0x00,0x00,0x00,0x00,0x00,EOT}},
75 {0xa, "PME, ACPI",
76 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
77 {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +000078 {EOT}}},
79 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
Jonathan Kollaschd74c7742010-10-24 12:43:41 +000080 {NOLDN, NULL,
81 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
82 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
83 {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
84 0x80,0x00,0x00,0x00,0x04,EOT}},
85 {0x0, "Floppy",
86 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
87 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
88 {0x1, "COM1",
89 {0x30,0x60,0x61,0x70,0xf0,EOT},
90 {0x01,0x03,0xf8,0x04,0x00,EOT}},
91 {0x2, "COM2",
92 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
93 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
94 {0x3, "Parallel port",
95 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
96 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
97 {0x4, "Hardware monitor",
98 {0x30,0x60,0x61,0x70,EOT},
99 {0x00,0x02,0x95,0x00,EOT}},
Uwe Hermann70159892010-10-24 14:19:09 +0000100 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
Jonathan Kollaschd74c7742010-10-24 12:43:41 +0000101 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
102 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
103 {0x6, "GPIO",
104 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
105 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
106 EOT},
107 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
108 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
109 EOT}},
110 {0x7, "VID",
111 {0x30,0x60,0x61,EOT},
112 {0x00,0x00,0x00,EOT}},
113 {0xa, "PME, ACPI",
114 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
115 {0x00,0x00,0x61,0x06,0x3c,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +0000116 {EOT}}},
117 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
Uwe Hermann0323a2b2008-10-09 23:56:11 +0000118 /* We assume reserved bits are read as 0. */
119 {NOLDN, NULL,
120 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
121 0x2b,0x2c,0x2d,EOT},
122 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
123 0x00,0x08,0x08,EOT}},
124 {0x0, "Floppy",
125 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
126 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
127 {0x1, "COM1",
128 {0x30,0x60,0x61,0x70,0xf0,EOT},
129 {0x01,0x03,0xf8,0x04,0x00,EOT}},
130 {0x2, "COM2",
131 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
132 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
133 {0x3, "Parallel port",
134 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
135 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
136 {0x4, "Hardware monitor",
137 {0x30,0x60,0x61,0x70,EOT},
138 {0x01,0x02,0x95,0x00,EOT}},
139 {0x5, "Keyboard",
140 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
141 {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
142 {0x6, "GPIO",
143 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
144 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
145 0xf3,EOT},
146 {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
147 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
148 0x00,EOT}},
149 {0x7, "VID",
150 {0x30,0x60,0x61,EOT},
151 {0x00,0x00,0x00,EOT}},
152 {0x7, "SPI",
153 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
154 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
155 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
156 0x00,0x00,0x00,0x00,0x00,EOT}},
157 {0xa, "PME, ACPI",
158 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
159 {0x00,0x00,0x01,0x06,0x1c,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +0000160 {EOT}}},
161 {0x0604, "F71805F/FG", {
Uwe Hermanne0ffaa12007-09-26 15:48:09 +0000162 /* We assume reserved bits are read as 0. */
163 {NOLDN, NULL,
Uwe Hermannb0ae9762008-10-14 16:34:38 +0000164 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
165 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
Uwe Hermanne0ffaa12007-09-26 15:48:09 +0000166 {0x0, "Floppy",
167 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
168 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
169 {0x1, "COM1",
170 {0x30,0x60,0x61,0x70,0xf0,EOT},
171 {0x01,0x03,0xf8,0x04,0x00,EOT}},
172 {0x2, "COM2",
173 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
174 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
175 {0x3, "Parallel port",
176 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
177 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
178 {0x4, "Hardware monitor",
179 {0x30,0x60,0x61,0x70,EOT},
180 {0x00,0x02,0x95,0x00,EOT}},
181 {0x6, "GPIO",
182 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
183 0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
184 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
185 0x00,0x00,NANA,0x00,NANA,EOT}},
186 {0xa, "PME",
187 {0x30,0xf0,0xf1,EOT},
188 {0x00,0x00,0x00,EOT}},
Uwe Hermann07024692007-09-20 22:13:48 +0000189 {EOT}}},
Uwe Hermanncfb6ac72008-10-01 20:16:58 +0000190 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
191 {EOT}}},
Stefan Reinauere7b7ae22010-08-17 08:24:01 +0000192 {0x0802, "F81216D/DG", {
193 {NOLDN, NULL,
194 {0x25,0x2f,EOT},
195 {0x00,RSVD,EOT}},
196 {0x0, "UART1",
197 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
198 {NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
199 {0x1, "UART2",
200 {0x30,0x60,0x61,0x70,0xf0,EOT},
201 {NANA,NANA,NANA,NANA,0x00,EOT}},
202 {0x2, "UART3",
203 {0x30,0x60,0x61,0x70,0xf0,EOT},
204 {NANA,NANA,NANA,NANA,0x00,EOT}},
205 {0x3, "UART4",
206 {0x30,0x60,0x61,0x70,0xf0,EOT},
207 {NANA,NANA,NANA,NANA,0x00,EOT}},
208 {0x8, "WDT",
209 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
210 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
211 {EOT}}},
212 {0x1602, "F81216AD", {
213 {NOLDN, NULL,
214 {0x25,0x27,EOT},
215 {0x00,NANA,EOT}},
216 {0x0, "UART1",
217 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
218 {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
219 {0x1, "UART2",
220 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
221 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
222 {0x2, "UART3",
223 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
224 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
225 {0x3, "UART4",
226 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
227 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
228 {0x8, "WDT",
229 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
230 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
231 {EOT}}},
Uwe Hermann07024692007-09-20 22:13:48 +0000232 {EOT}
233};
234
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000235void probe_idregs_fintek(uint16_t port)
236{
Uwe Hermannb4db2202007-09-20 23:37:56 +0000237 uint16_t vid, did;
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000238
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000239 probing_for("Fintek", "", port);
240
Uwe Hermannb4db2202007-09-20 23:37:56 +0000241 enter_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000242
Uwe Hermann07024692007-09-20 22:13:48 +0000243 did = regval(port, DEVICE_ID_BYTE1_REG);
244 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
Uwe Hermann07024692007-09-20 22:13:48 +0000245
246 vid = regval(port, VENDOR_ID_BYTE1_REG);
247 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
248
Uwe Hermann6b4ad432007-09-23 13:17:29 +0000249 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000250 if (verbose)
251 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
Uwe Hermannb4db2202007-09-20 23:37:56 +0000252 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann07024692007-09-20 22:13:48 +0000253 return;
254 }
255
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000256 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
Uwe Hermann945045b2007-09-28 15:39:10 +0000257 get_superio_name(reg_table, did), vid, did, port);
Uwe Hermanne9d46162007-10-07 20:01:23 +0000258 chip_found = 1;
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000259
Stefan Reinauer7a51e502008-12-01 14:18:57 +0000260 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000261
Uwe Hermannb4db2202007-09-20 23:37:56 +0000262 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000263}
Robinson P. Tryon552cfb72008-01-15 22:30:55 +0000264
Stefan Reinauere7b7ae22010-08-17 08:24:01 +0000265
266void probe_idregs_fintek_alternative(uint16_t port)
267{
268 uint16_t vid, did;
269
270 probing_for("Fintek", "", port);
271
272 enter_conf_mode_fintek_7777(port);
273
274 did = regval(port, DEVICE_ID_BYTE1_REG);
275 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
276
277 vid = regval(port, VENDOR_ID_BYTE1_REG);
278 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
279
280 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
281 if (verbose)
282 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
283 exit_conf_mode_fintek_7777(port);
284 return;
285 }
286
287 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
288 get_superio_name(reg_table, did), vid, did, port);
289 chip_found = 1;
290
291 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
292
293 exit_conf_mode_fintek_7777(port);
294}
295
Robinson P. Tryon552cfb72008-01-15 22:30:55 +0000296void print_fintek_chips(void)
297{
298 print_vendor_chips("Fintek", reg_table);
299}