Angel Pons | f94ac9a | 2020-04-05 15:46:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 5 | #include <device/device.h> |
| 6 | #include <device/pci.h> |
| 7 | #include <device/pci_def.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 8 | #include <soc/iobp.h> |
| 9 | #include <soc/pch.h> |
| 10 | #include <soc/pci_devs.h> |
| 11 | #include <soc/ramstage.h> |
| 12 | #include <soc/rcba.h> |
| 13 | #include <soc/serialio.h> |
| 14 | #include <soc/spi.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 15 | |
| 16 | u8 pch_revision(void) |
| 17 | { |
| 18 | return pci_read_config8(PCH_DEV_LPC, PCI_REVISION_ID); |
| 19 | } |
| 20 | |
| 21 | u16 pch_type(void) |
| 22 | { |
| 23 | return pci_read_config16(PCH_DEV_LPC, PCI_DEVICE_ID); |
| 24 | } |
| 25 | |
| 26 | /* Return 1 if PCH type is WildcatPoint */ |
| 27 | int pch_is_wpt(void) |
| 28 | { |
| 29 | return ((pch_type() & 0xfff0) == 0x9cc0) ? 1 : 0; |
| 30 | } |
| 31 | |
| 32 | /* Return 1 if PCH type is WildcatPoint ULX */ |
| 33 | int pch_is_wpt_ulx(void) |
| 34 | { |
| 35 | u16 lpcid = pch_type(); |
| 36 | |
| 37 | switch (lpcid) { |
| 38 | case PCH_WPT_BDW_Y_SAMPLE: |
| 39 | case PCH_WPT_BDW_Y_PREMIUM: |
| 40 | case PCH_WPT_BDW_Y_BASE: |
| 41 | return 1; |
| 42 | } |
| 43 | |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | u32 pch_read_soft_strap(int id) |
| 48 | { |
| 49 | u32 fdoc; |
| 50 | |
| 51 | fdoc = SPIBAR32(SPIBAR_FDOC); |
| 52 | fdoc &= ~0x00007ffc; |
| 53 | SPIBAR32(SPIBAR_FDOC) = fdoc; |
| 54 | |
| 55 | fdoc |= 0x00004000; |
| 56 | fdoc |= id * 4; |
| 57 | SPIBAR32(SPIBAR_FDOC) = fdoc; |
| 58 | |
| 59 | return SPIBAR32(SPIBAR_FDOD); |
| 60 | } |
| 61 | |
Kyösti Mälkki | 55d0ab5 | 2019-09-12 15:44:28 +0300 | [diff] [blame] | 62 | #ifndef __SIMPLE_DEVICE__ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 63 | |
| 64 | /* Put device in D3Hot Power State */ |
Elyes HAOUAS | 4658a98 | 2018-09-20 08:46:35 +0200 | [diff] [blame] | 65 | static void pch_enable_d3hot(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 66 | { |
Angel Pons | 2ead363 | 2020-09-24 16:50:05 +0200 | [diff] [blame] | 67 | pci_or_config32(dev, PCH_PCS, PCH_PCS_PS_D3HOT); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 68 | } |
| 69 | |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 70 | /* RCBA function disable and posting read to flush the transaction */ |
| 71 | static void rcba_function_disable(u32 reg, u32 bit) |
| 72 | { |
| 73 | RCBA32_OR(reg, bit); |
| 74 | RCBA32(reg); |
| 75 | } |
| 76 | |
Martin Roth | de7ed6f | 2014-12-07 14:58:18 -0700 | [diff] [blame] | 77 | /* Set bit in Function Disable register to hide this device */ |
Elyes HAOUAS | 4658a98 | 2018-09-20 08:46:35 +0200 | [diff] [blame] | 78 | void pch_disable_devfn(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 79 | { |
| 80 | switch (dev->path.pci.devfn) { |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 81 | case PCH_DEVFN_ADSP: /* Audio DSP */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 82 | rcba_function_disable(FD, PCH_DISABLE_ADSPD); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 83 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 84 | case PCH_DEVFN_XHCI: /* XHCI */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 85 | rcba_function_disable(FD, PCH_DISABLE_XHCI); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 86 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 87 | case PCH_DEVFN_SDMA: /* DMA */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 88 | pch_enable_d3hot(dev); |
| 89 | pch_iobp_update(SIO_IOBP_FUNCDIS0, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 90 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 91 | case PCH_DEVFN_I2C0: /* I2C0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 92 | pch_enable_d3hot(dev); |
| 93 | pch_iobp_update(SIO_IOBP_FUNCDIS1, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 94 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 95 | case PCH_DEVFN_I2C1: /* I2C1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 96 | pch_enable_d3hot(dev); |
| 97 | pch_iobp_update(SIO_IOBP_FUNCDIS2, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 98 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 99 | case PCH_DEVFN_SPI0: /* SPI0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 100 | pch_enable_d3hot(dev); |
| 101 | pch_iobp_update(SIO_IOBP_FUNCDIS3, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 102 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 103 | case PCH_DEVFN_SPI1: /* SPI1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 104 | pch_enable_d3hot(dev); |
| 105 | pch_iobp_update(SIO_IOBP_FUNCDIS4, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 106 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 107 | case PCH_DEVFN_UART0: /* UART0 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 108 | pch_enable_d3hot(dev); |
| 109 | pch_iobp_update(SIO_IOBP_FUNCDIS5, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 110 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 111 | case PCH_DEVFN_UART1: /* UART1 */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 112 | pch_enable_d3hot(dev); |
| 113 | pch_iobp_update(SIO_IOBP_FUNCDIS6, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 114 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 115 | case PCH_DEVFN_ME: /* MEI #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 116 | rcba_function_disable(FD2, PCH_DISABLE_MEI1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 117 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 118 | case PCH_DEVFN_ME_2: /* MEI #2 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 119 | rcba_function_disable(FD2, PCH_DISABLE_MEI2); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 120 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 121 | case PCH_DEVFN_ME_IDER: /* IDE-R */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 122 | rcba_function_disable(FD2, PCH_DISABLE_IDER); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 123 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 124 | case PCH_DEVFN_ME_KT: /* KT */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 125 | rcba_function_disable(FD2, PCH_DISABLE_KT); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 126 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 127 | case PCH_DEVFN_SDIO: /* SDIO */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 128 | pch_enable_d3hot(dev); |
| 129 | pch_iobp_update(SIO_IOBP_FUNCDIS7, ~0UL, SIO_IOBP_FUNCDIS_DIS); |
| 130 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 131 | case PCH_DEVFN_GBE: /* Gigabit Ethernet */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 132 | rcba_function_disable(BUC, PCH_DISABLE_GBE); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 133 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 134 | case PCH_DEVFN_HDA: /* HD Audio Controller */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 135 | rcba_function_disable(FD, PCH_DISABLE_HD_AUDIO); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 136 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 137 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 0): /* PCI Express Root Port 1 */ |
| 138 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 1): /* PCI Express Root Port 2 */ |
| 139 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 2): /* PCI Express Root Port 3 */ |
| 140 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 3): /* PCI Express Root Port 4 */ |
| 141 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 4): /* PCI Express Root Port 5 */ |
| 142 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 5): /* PCI Express Root Port 6 */ |
| 143 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 6): /* PCI Express Root Port 7 */ |
| 144 | case PCI_DEVFN(PCH_DEV_SLOT_PCIE, 7): /* PCI Express Root Port 8 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 145 | rcba_function_disable(FD, |
| 146 | PCH_DISABLE_PCIE(PCI_FUNC(dev->path.pci.devfn))); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 147 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 148 | case PCH_DEVFN_EHCI: /* EHCI #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 149 | rcba_function_disable(FD, PCH_DISABLE_EHCI1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 150 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 151 | case PCH_DEVFN_LPC: /* LPC */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 152 | rcba_function_disable(FD, PCH_DISABLE_LPC); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 153 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 154 | case PCH_DEVFN_SATA: /* SATA #1 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 155 | rcba_function_disable(FD, PCH_DISABLE_SATA1); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 156 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 157 | case PCH_DEVFN_SMBUS: /* SMBUS */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 158 | rcba_function_disable(FD, PCH_DISABLE_SMBUS); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 159 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 160 | case PCH_DEVFN_SATA2: /* SATA #2 */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 161 | rcba_function_disable(FD, PCH_DISABLE_SATA2); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 162 | break; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 163 | case PCH_DEVFN_THERMAL: /* Thermal Subsystem */ |
Wenkai Du | aec2442 | 2014-10-15 11:19:16 -0700 | [diff] [blame] | 164 | rcba_function_disable(FD, PCH_DISABLE_THERMAL); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 165 | break; |
| 166 | } |
| 167 | } |
| 168 | |
Angel Pons | 3cc2c38 | 2020-10-23 20:38:23 +0200 | [diff] [blame] | 169 | static void broadwell_pch_enable_dev(struct device *dev) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 170 | { |
Angel Pons | 3cc2c38 | 2020-10-23 20:38:23 +0200 | [diff] [blame] | 171 | if (dev->path.type != DEVICE_PATH_PCI) |
| 172 | return; |
| 173 | |
| 174 | if (dev->ops && dev->ops->enable) |
| 175 | return; |
| 176 | |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 177 | /* These devices need special enable/disable handling */ |
| 178 | switch (PCI_SLOT(dev->path.pci.devfn)) { |
| 179 | case PCH_DEV_SLOT_PCIE: |
| 180 | case PCH_DEV_SLOT_EHCI: |
| 181 | case PCH_DEV_SLOT_HDA: |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 182 | return; |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 183 | } |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 184 | |
| 185 | if (!dev->enabled) { |
| 186 | printk(BIOS_DEBUG, "%s: Disabling device\n", dev_path(dev)); |
| 187 | |
| 188 | /* Ensure memory, io, and bus master are all disabled */ |
Angel Pons | 6b486e1 | 2020-10-28 14:16:06 +0100 | [diff] [blame] | 189 | pci_and_config16(dev, PCI_COMMAND, |
| 190 | ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO)); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 191 | |
| 192 | /* Disable this device if possible */ |
| 193 | pch_disable_devfn(dev); |
| 194 | } else { |
| 195 | /* Enable SERR */ |
Elyes HAOUAS | b887adf | 2020-04-29 10:42:34 +0200 | [diff] [blame] | 196 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_SERR); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 197 | } |
| 198 | } |
| 199 | |
Angel Pons | 3cc2c38 | 2020-10-23 20:38:23 +0200 | [diff] [blame] | 200 | struct chip_operations soc_intel_broadwell_pch_ops = { |
| 201 | CHIP_NAME("Intel Broadwell PCH") |
| 202 | .enable_dev = &broadwell_pch_enable_dev, |
| 203 | }; |
| 204 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 205 | #endif |