soc/intel/broadwell: Align cosmetics with Haswell/Lynx Point
Tested with BUILD_TIMELESS=1, Purism Librem 13v1 does not change.
Change-Id: Icf41d9db20e492ec77a83f8413ac99a654d6c8ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45697
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index 479323d..2a27d92 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -64,9 +64,7 @@
/* Put device in D3Hot Power State */
static void pch_enable_d3hot(struct device *dev)
{
- u32 reg32 = pci_read_config32(dev, PCH_PCS);
- reg32 |= PCH_PCS_PS_D3HOT;
- pci_write_config32(dev, PCH_PCS, reg32);
+ pci_or_config32(dev, PCH_PCS, PCH_PCS_PS_D3HOT);
}
/* RCBA function disable and posting read to flush the transaction */