Angel Pons | c3f58f6 | 2020-04-05 15:46:41 +0200 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 3 | |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <arch/pci_ops.h> |
| 7 | |
Julius Werner | 18ea2d3 | 2014-10-07 16:42:17 -0700 | [diff] [blame] | 8 | #include <soc/pci_devs.h> |
| 9 | #include <soc/ramstage.h> |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 10 | #include "chip.h" |
| 11 | |
Elyes HAOUAS | 17a3ceb | 2018-05-22 10:42:28 +0200 | [diff] [blame] | 12 | static void pci_domain_set_resources(struct device *dev) |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 13 | { |
| 14 | assign_resources(dev->link_list); |
| 15 | } |
| 16 | |
| 17 | static struct device_operations pci_domain_ops = { |
| 18 | .read_resources = pci_domain_read_resources, |
| 19 | .set_resources = pci_domain_set_resources, |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 20 | .scan_bus = pci_domain_scan_bus, |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 21 | }; |
| 22 | |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 23 | static struct device_operations cpu_bus_ops = { |
Edward O'Callaghan | 0625a8b | 2014-10-31 08:03:16 +1100 | [diff] [blame] | 24 | .read_resources = DEVICE_NOOP, |
| 25 | .set_resources = DEVICE_NOOP, |
| 26 | .enable_resources = DEVICE_NOOP, |
Aaron Durbin | 302cbd6 | 2013-10-21 12:36:17 -0500 | [diff] [blame] | 27 | .init = baytrail_init_cpus, |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 28 | }; |
| 29 | |
| 30 | |
Elyes HAOUAS | 17a3ceb | 2018-05-22 10:42:28 +0200 | [diff] [blame] | 31 | static void enable_dev(struct device *dev) |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 32 | { |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 33 | /* Set the operations if it is a special bus type */ |
| 34 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 35 | dev->ops = &pci_domain_ops; |
| 36 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 37 | dev->ops = &cpu_bus_ops; |
Aaron Durbin | d7bc23a | 2013-10-29 16:37:10 -0500 | [diff] [blame] | 38 | } else if (dev->path.type == DEVICE_PATH_PCI) { |
| 39 | /* Handle south cluster enablement. */ |
| 40 | if (PCI_SLOT(dev->path.pci.devfn) > GFX_DEV && |
| 41 | (dev->ops == NULL || dev->ops->enable == NULL)) { |
| 42 | southcluster_enable_dev(dev); |
| 43 | } |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 44 | } |
| 45 | } |
| 46 | |
Aaron Durbin | 452d31a | 2013-09-24 16:47:49 -0500 | [diff] [blame] | 47 | /* Called at BS_DEV_INIT_CHIPS time -- very early. Just after BS_PRE_DEVICE. */ |
| 48 | static void soc_init(void *chip_info) |
| 49 | { |
Kein Yuan | 3511023 | 2014-02-22 12:26:55 -0800 | [diff] [blame] | 50 | baytrail_init_pre_device(chip_info); |
Aaron Durbin | 452d31a | 2013-09-24 16:47:49 -0500 | [diff] [blame] | 51 | } |
| 52 | |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 53 | struct chip_operations soc_intel_baytrail_ops = { |
| 54 | CHIP_NAME("Intel BayTrail SoC") |
| 55 | .enable_dev = enable_dev, |
Aaron Durbin | 452d31a | 2013-09-24 16:47:49 -0500 | [diff] [blame] | 56 | .init = soc_init, |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 57 | }; |
Aaron Durbin | fda56a6 | 2013-09-24 12:29:57 -0500 | [diff] [blame] | 58 | |
Aaron Durbin | fda56a6 | 2013-09-24 12:29:57 -0500 | [diff] [blame] | 59 | struct pci_operations soc_pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 60 | .set_subsystem = &pci_dev_set_subsystem, |
Aaron Durbin | fda56a6 | 2013-09-24 12:29:57 -0500 | [diff] [blame] | 61 | }; |