blob: 5a5c364f5f9533f27f8162ebcd07dbc2c27a5540 [file] [log] [blame]
Aaron Durbin9a7d7bc2013-09-07 00:41:48 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <console/console.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <arch/pci_ops.h>
24
25#include <baytrail/pci_devs.h>
26#include <baytrail/ramstage.h>
27#include "chip.h"
28
29static void pci_domain_set_resources(device_t dev)
30{
31 assign_resources(dev->link_list);
32}
33
34static struct device_operations pci_domain_ops = {
35 .read_resources = pci_domain_read_resources,
36 .set_resources = pci_domain_set_resources,
37 .enable_resources = NULL,
38 .init = NULL,
39 .scan_bus = pci_domain_scan_bus,
40 .ops_pci_bus = pci_bus_default_ops,
41};
42
43static void cpu_bus_init(device_t dev)
44{
45 printk(BIOS_DEBUG, "cpu_bus_init()\n");
46}
47
48static void cpu_bus_noop(device_t dev) { }
49
50static struct device_operations cpu_bus_ops = {
51 .read_resources = cpu_bus_noop,
52 .set_resources = cpu_bus_noop,
53 .enable_resources = cpu_bus_noop,
54 .init = cpu_bus_init,
55 .scan_bus = 0,
56};
57
58
59static void enable_dev(device_t dev)
60{
61 printk(BIOS_DEBUG, "enable_dev(%s, %d)\n",
62 dev_name(dev), dev->path.type);
63 /* Set the operations if it is a special bus type */
64 if (dev->path.type == DEVICE_PATH_DOMAIN) {
65 dev->ops = &pci_domain_ops;
66 } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
67 dev->ops = &cpu_bus_ops;
68 }
69}
70
71struct chip_operations soc_intel_baytrail_ops = {
72 CHIP_NAME("Intel BayTrail SoC")
73 .enable_dev = enable_dev,
74};