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Angel Ponsf94ac9a2020-04-05 15:46:48 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Duncan Lauriec88c54c2014-04-30 16:36:13 -07002
3#include <console/console.h>
4#include <device/device.h>
5#include <device/pci.h>
6#include <device/pci_ids.h>
7#include <device/pci_ops.h>
Kyösti Mälkki13f66502019-03-03 08:01:05 +02008#include <device/mmio.h>
Matt DeVillierf8960a62016-11-16 23:37:43 -06009#include <soc/igd.h>
Angel Ponsb5d56f92021-06-23 12:47:49 +020010#include <southbridge/intel/lynxpoint/hda_verb.h>
Duncan Lauriec88c54c2014-04-30 16:36:13 -070011
12static const u32 minihd_verb_table[] = {
13 /* coreboot specific header */
Angel Pons2ead3632020-09-24 16:50:05 +020014 0x80862808, /* Codec Vendor / Device ID: Intel Broadwell Mini-HD */
15 0x80860101, /* Subsystem ID */
16 4, /* Number of jacks */
Duncan Lauriec88c54c2014-04-30 16:36:13 -070017
18 /* Enable 3rd Pin and Converter Widget */
19 0x00878101,
20
21 /* Pin Widget 5 - PORT B */
Angel Pons2ead3632020-09-24 16:50:05 +020022 0x00571c10,
23 0x00571d00,
24 0x00571e56,
25 0x00571f18,
Duncan Lauriec88c54c2014-04-30 16:36:13 -070026
27 /* Pin Widget 6 - PORT C */
Angel Pons2ead3632020-09-24 16:50:05 +020028 0x00671c20,
29 0x00671d00,
30 0x00671e56,
31 0x00671f18,
Duncan Lauriec88c54c2014-04-30 16:36:13 -070032
33 /* Pin Widget 7 - PORT D */
Angel Pons2ead3632020-09-24 16:50:05 +020034 0x00771c30,
35 0x00771d00,
36 0x00771e56,
37 0x00771f18,
Duncan Lauriec88c54c2014-04-30 16:36:13 -070038
39 /* Disable 3rd Pin and Converter Widget */
40 0x00878100,
41
42 /* Dummy entries to fill out the table */
43 0x00878100,
44 0x00878100,
45};
46
47static void minihd_init(struct device *dev)
48{
49 struct resource *res;
Jacob Garberea61c0e2019-07-22 12:53:27 -060050 u32 reg32;
Angel Pons2ead3632020-09-24 16:50:05 +020051 u8 *base;
Duncan Lauriec88c54c2014-04-30 16:36:13 -070052 int codec_mask, i;
53
54 /* Find base address */
Angel Ponsc1bfbe02021-11-03 13:18:53 +010055 res = probe_resource(dev, PCI_BASE_ADDRESS_0);
Duncan Lauriec88c54c2014-04-30 16:36:13 -070056 if (!res)
57 return;
58
Kevin Paul Herbertbde6d302014-12-24 18:43:20 -080059 base = res2mmio(res, 0, 0);
60 printk(BIOS_DEBUG, "Mini-HD: base = %p\n", base);
Duncan Lauriec88c54c2014-04-30 16:36:13 -070061
62 /* Set Bus Master */
Elyes HAOUASb887adf2020-04-29 10:42:34 +020063 pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER);
Duncan Lauriec88c54c2014-04-30 16:36:13 -070064
65 /* Mini-HD configuration */
66 reg32 = read32(base + 0x100c);
67 reg32 &= 0xfffc0000;
68 reg32 |= 0x4;
69 write32(base + 0x100c, reg32);
70
71 reg32 = read32(base + 0x1010);
72 reg32 &= 0xfffc0000;
73 reg32 |= 0x4b;
74 write32(base + 0x1010, reg32);
75
76 /* Init the codec and write the verb table */
77 codec_mask = hda_codec_detect(base);
78
79 if (codec_mask) {
80 for (i = 3; i >= 0; i--) {
81 if (codec_mask & (1 << i))
Angel Pons2ead3632020-09-24 16:50:05 +020082 hda_codec_init(base, i, sizeof(minihd_verb_table),
Duncan Lauriec88c54c2014-04-30 16:36:13 -070083 minihd_verb_table);
84 }
85 }
Matt DeVillierf8960a62016-11-16 23:37:43 -060086
87 /* Set EM4/EM5 registers */
88 write32(base + 0x0100c, igd_get_reg_em4());
89 write32(base + 0x01010, igd_get_reg_em5());
Duncan Lauriec88c54c2014-04-30 16:36:13 -070090}
91
92static struct device_operations minihd_ops = {
Angel Pons2ead3632020-09-24 16:50:05 +020093 .read_resources = pci_dev_read_resources,
94 .set_resources = pci_dev_set_resources,
95 .enable_resources = pci_dev_enable_resources,
96 .init = minihd_init,
Angel Ponscb2080f2020-10-23 15:45:44 +020097 .ops_pci = &pci_dev_ops_pci,
Duncan Lauriec88c54c2014-04-30 16:36:13 -070098};
99
100static const unsigned short pci_device_ids[] = {
101 0x0a0c, /* Haswell */
102 0x160c, /* Broadwell */
103 0
104};
105
106static const struct pci_driver minihd_driver __pci_driver = {
107 .ops = &minihd_ops,
108 .vendor = PCI_VENDOR_ID_INTEL,
109 .devices = pci_device_ids,
110};