blob: 43aeec20aecbc70e9bb7f111c7e0dcb33ce11ede [file] [log] [blame]
Duncan Lauriec88c54c2014-04-30 16:36:13 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2008-2009 coresystems GmbH
6 * Copyright (C) 2014 Google Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22#include <console/console.h>
23#include <device/device.h>
24#include <device/pci.h>
25#include <device/pci_ids.h>
26#include <device/pci_ops.h>
27#include <arch/io.h>
28#include <delay.h>
29#include <stdlib.h>
30#include <soc/intel/common/hda_verb.h>
31#include <broadwell/ramstage.h>
32
33static const u32 minihd_verb_table[] = {
34 /* coreboot specific header */
35 0x80862807, // Codec Vendor / Device ID: Intel Mini-HD
36 0x00000000, // Subsystem ID
37 0x00000004, // Number of jacks
38
39 /* Enable 3rd Pin and Converter Widget */
40 0x00878101,
41
42 /* Pin Widget 5 - PORT B */
43 0x00571C10,
44 0x00571D00,
45 0x00571E56,
46 0x00571F18,
47
48 /* Pin Widget 6 - PORT C */
49 0x00671C20,
50 0x00671D00,
51 0x00671E56,
52 0x00671F18,
53
54 /* Pin Widget 7 - PORT D */
55 0x00771C30,
56 0x00771D00,
57 0x00771E56,
58 0x00771F18,
59
60 /* Disable 3rd Pin and Converter Widget */
61 0x00878100,
62
63 /* Dummy entries to fill out the table */
64 0x00878100,
65 0x00878100,
66};
67
68static void minihd_init(struct device *dev)
69{
70 struct resource *res;
71 u32 base, reg32;
72 int codec_mask, i;
73
74 /* Find base address */
75 res = find_resource(dev, PCI_BASE_ADDRESS_0);
76 if (!res)
77 return;
78
79 base = (u32)res->base;
80 printk(BIOS_DEBUG, "Mini-HD: base = %08x\n", (u32)base);
81
82 /* Set Bus Master */
83 reg32 = pci_read_config32(dev, PCI_COMMAND);
84 pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
85
86 /* Mini-HD configuration */
87 reg32 = read32(base + 0x100c);
88 reg32 &= 0xfffc0000;
89 reg32 |= 0x4;
90 write32(base + 0x100c, reg32);
91
92 reg32 = read32(base + 0x1010);
93 reg32 &= 0xfffc0000;
94 reg32 |= 0x4b;
95 write32(base + 0x1010, reg32);
96
97 /* Init the codec and write the verb table */
98 codec_mask = hda_codec_detect(base);
99
100 if (codec_mask) {
101 for (i = 3; i >= 0; i--) {
102 if (codec_mask & (1 << i))
103 hda_codec_init(base, i,
104 sizeof(minihd_verb_table),
105 minihd_verb_table);
106 }
107 }
108}
109
110static struct device_operations minihd_ops = {
111 .read_resources = &pci_dev_read_resources,
112 .set_resources = &pci_dev_set_resources,
113 .enable_resources = &pci_dev_enable_resources,
114 .init = &minihd_init,
115 .ops_pci = &broadwell_pci_ops,
116};
117
118static const unsigned short pci_device_ids[] = {
119 0x0a0c, /* Haswell */
120 0x160c, /* Broadwell */
121 0
122};
123
124static const struct pci_driver minihd_driver __pci_driver = {
125 .ops = &minihd_ops,
126 .vendor = PCI_VENDOR_ID_INTEL,
127 .devices = pci_device_ids,
128};