Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2015 Google Inc |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #include <memlayout.h> |
| 17 | #include <arch/header.ld> |
| 18 | |
| 19 | SECTIONS |
| 20 | { |
| 21 | /* |
| 22 | * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively |
| 23 | * like other architectures/chipsets it's not possible because of |
| 24 | * the linking games played during romstage creation by trying |
| 25 | * to find the final landing place in CBFS for XIP. Therefore, |
| 26 | * conditionalize with macros. |
| 27 | */ |
| 28 | #if ENV_RAMSTAGE |
Kyösti Mälkki | d30c129 | 2018-06-03 14:18:23 +0300 | [diff] [blame] | 29 | RAMSTAGE(CONFIG_RAMBASE, (CONFIG_RELOCATABLE_RAMSTAGE ? 8M : |
| 30 | CONFIG_RAMTOP - CONFIG_RAMBASE)) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 31 | |
| 32 | #elif ENV_ROMSTAGE |
Aaron Durbin | 294ce85 | 2015-09-15 17:04:13 -0500 | [diff] [blame] | 33 | /* The 1M size is not allocated. It's just for basic size checking. |
| 34 | * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ |
Andrey Petrov | ccd300b | 2016-02-28 22:04:51 -0800 | [diff] [blame] | 35 | ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 36 | |
| 37 | /* Pull in the cache-as-ram rules. */ |
| 38 | #include "car.ld" |
Aaron Durbin | 75c51d9 | 2015-09-29 16:31:20 -0500 | [diff] [blame] | 39 | #elif ENV_VERSTAGE |
| 40 | /* The 1M size is not allocated. It's just for basic size checking. |
| 41 | * Link at 32MiB address and rely on cbfstool to relocate to XIP. */ |
Andrey Petrov | ccd300b | 2016-02-28 22:04:51 -0800 | [diff] [blame] | 42 | VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M) |
Aaron Durbin | 75c51d9 | 2015-09-29 16:31:20 -0500 | [diff] [blame] | 43 | |
| 44 | /* Pull in the cache-as-ram rules. */ |
| 45 | #include "car.ld" |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 46 | #elif ENV_BOOTBLOCK |
| 47 | /* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains |
| 48 | * the logic for the romcc linking. */ |
Aaron Durbin | 65ac3d8 | 2016-02-11 14:36:19 -0600 | [diff] [blame] | 49 | BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1, |
| 50 | CONFIG_C_ENV_BOOTBLOCK_SIZE) |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 51 | |
| 52 | /* Pull in the cache-as-ram rules. */ |
| 53 | #include "car.ld" |
| 54 | |
Aaron Durbin | 7f8afe0 | 2016-03-18 12:21:23 -0500 | [diff] [blame] | 55 | #elif ENV_POSTCAR |
| 56 | POSTCAR(32M, 1M) |
Aaron Durbin | 956c4f2 | 2015-09-05 13:31:14 -0500 | [diff] [blame] | 57 | #endif |
| 58 | } |
Aaron Durbin | eb907b3 | 2016-01-21 00:08:17 -0600 | [diff] [blame] | 59 | |
| 60 | #if ENV_BOOTBLOCK |
| 61 | /* Bootblock specific scripts which provide more SECTION directives. */ |
| 62 | #include <cpu/x86/16bit/entry16.ld> |
| 63 | #include <cpu/x86/16bit/reset16.ld> |
| 64 | #include <arch/x86/id.ld> |
| 65 | #if IS_ENABLED(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE) |
| 66 | #include <cpu/intel/fit/fit.ld> |
| 67 | #endif |
| 68 | #endif /* ENV_BOOTBLOCK */ |