blob: 58317234664427c5f5020224f605d55382980267 [file] [log] [blame]
Aaron Durbin956c4f22015-09-05 13:31:14 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 Google Inc
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Aaron Durbin956c4f22015-09-05 13:31:14 -050014 */
15
16#include <memlayout.h>
17#include <arch/header.ld>
18
19SECTIONS
20{
21 /*
22 * It would be good to lay down RAMSTAGE, ROMSTAGE, etc consecutively
23 * like other architectures/chipsets it's not possible because of
24 * the linking games played during romstage creation by trying
25 * to find the final landing place in CBFS for XIP. Therefore,
26 * conditionalize with macros.
27 */
28#if ENV_RAMSTAGE
Kyösti Mälkkid30c1292018-06-03 14:18:23 +030029 RAMSTAGE(CONFIG_RAMBASE, (CONFIG_RELOCATABLE_RAMSTAGE ? 8M :
30 CONFIG_RAMTOP - CONFIG_RAMBASE))
Aaron Durbin956c4f22015-09-05 13:31:14 -050031
32#elif ENV_ROMSTAGE
Aaron Durbin294ce852015-09-15 17:04:13 -050033 /* The 1M size is not allocated. It's just for basic size checking.
34 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
Andrey Petrovccd300b2016-02-28 22:04:51 -080035 ROMSTAGE(CONFIG_ROMSTAGE_ADDR, 1M)
Aaron Durbin956c4f22015-09-05 13:31:14 -050036
37 /* Pull in the cache-as-ram rules. */
38 #include "car.ld"
Aaron Durbin75c51d92015-09-29 16:31:20 -050039#elif ENV_VERSTAGE
40 /* The 1M size is not allocated. It's just for basic size checking.
41 * Link at 32MiB address and rely on cbfstool to relocate to XIP. */
Andrey Petrovccd300b2016-02-28 22:04:51 -080042 VERSTAGE(CONFIG_VERSTAGE_ADDR, 1M)
Aaron Durbin75c51d92015-09-29 16:31:20 -050043
44 /* Pull in the cache-as-ram rules. */
45 #include "car.ld"
Aaron Durbineb907b32016-01-21 00:08:17 -060046#elif ENV_BOOTBLOCK
47 /* This is for C_ENVIRONMENT_BOOTBLOCK. arch/x86/bootblock.ld contains
48 * the logic for the romcc linking. */
Aaron Durbin65ac3d82016-02-11 14:36:19 -060049 BOOTBLOCK(0xffffffff - CONFIG_C_ENV_BOOTBLOCK_SIZE + 1,
50 CONFIG_C_ENV_BOOTBLOCK_SIZE)
Aaron Durbineb907b32016-01-21 00:08:17 -060051
52 /* Pull in the cache-as-ram rules. */
53 #include "car.ld"
54
Aaron Durbin7f8afe02016-03-18 12:21:23 -050055#elif ENV_POSTCAR
56 POSTCAR(32M, 1M)
Aaron Durbin956c4f22015-09-05 13:31:14 -050057#endif
58}
Aaron Durbineb907b32016-01-21 00:08:17 -060059
60#if ENV_BOOTBLOCK
61/* Bootblock specific scripts which provide more SECTION directives. */
62#include <cpu/x86/16bit/entry16.ld>
63#include <cpu/x86/16bit/reset16.ld>
64#include <arch/x86/id.ld>
65#if IS_ENABLED(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE)
66#include <cpu/intel/fit/fit.ld>
67#endif
68#endif /* ENV_BOOTBLOCK */