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Angel Pons89ab2502020-04-03 01:22:28 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Vladimir Serbinenko94930e22014-08-24 22:40:33 +02002
3#include <stdint.h>
Furquan Shaikh76cedd22020-05-02 10:24:23 -07004#include <acpi/acpi.h>
Edward O'Callaghan77757c22015-01-04 21:33:39 +11005#include <northbridge/intel/sandybridge/sandybridge.h>
Arthur Heymans4c81d442018-01-29 12:14:37 +01006#include <northbridge/intel/sandybridge/raminit.h>
Edward O'Callaghan77757c22015-01-04 21:33:39 +11007#include <northbridge/intel/sandybridge/raminit_native.h>
8#include <southbridge/intel/bd82x6x/pch.h>
Patrick Rudolphe8e66f42016-02-06 17:42:42 +01009#include <southbridge/intel/common/gpio.h>
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020010
Arthur Heymans4c81d442018-01-29 12:14:37 +010011void mainboard_fill_pei_data(struct pei_data *pei_data)
12{
13 struct pei_data pei_data_template = {
14 .pei_version = PEI_VERSION,
15 .mchbar = (uintptr_t)DEFAULT_MCHBAR,
16 .dmibar = (uintptr_t)DEFAULT_DMIBAR,
17 .epbar = DEFAULT_EPBAR,
18 .pciexbar = CONFIG_MMCONF_BASE_ADDRESS,
Angel Ponsb21bffa2020-07-03 01:02:28 +020019 .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE,
Arthur Heymans4c81d442018-01-29 12:14:37 +010020 .wdbbar = 0x4000000,
21 .wdbsize = 0x1000,
22 .hpet_address = CONFIG_HPET_ADDRESS,
23 .rcba = (uintptr_t)DEFAULT_RCBABASE,
24 .pmbase = DEFAULT_PMBASE,
25 .gpiobase = DEFAULT_GPIOBASE,
26 .thermalbase = 0xfed08000,
27 .system_type = 0, // 0 Mobile, 1 Desktop/Server
28 .tseg_size = CONFIG_SMM_TSEG_SIZE,
29 .spd_addresses = { 0xa0, 0x00,0xa2,0x00 },
30 .ts_addresses = { 0x00, 0x00, 0x00, 0x00 },
31 .ec_present = 1,
32 .gbe_enable = 1,
33 // 0 = leave channel enabled
34 // 1 = disable dimm 0 on channel
35 // 2 = disable dimm 1 on channel
36 // 3 = disable dimm 0+1 on channel
37 .dimm_channel0_disabled = 2,
38 .dimm_channel1_disabled = 2,
39 .max_ddr3_freq = 1333,
40 .usb_port_config = {
41 { 1, 0, 0x0040 },
42 { 1, 1, 0x0080 },
43 { 1, 3, 0x0080 },
44 { 1, 3, 0x0080 },
45 { 1, 0, 0x0080 },
46 { 1, 0, 0x0080 },
47 { 1, 2, 0x0040 },
48 { 1, 2, 0x0040 },
49 { 1, 6, 0x0080 },
50 { 1, 5, 0x0080 },
51 { 1, 6, 0x0080 },
52 { 1, 6, 0x0080 },
53 { 1, 7, 0x0080 },
54 { 1, 6, 0x0080 },
55 },
56 };
57 *pei_data = pei_data_template;
58}
59
Kyösti Mälkkie258b9a2016-11-18 19:59:23 +020060void mainboard_get_spd(spd_raw_data *spd, bool id_only)
Jan Tatjeb8743082016-06-04 19:29:03 +020061{
Kyösti Mälkkie258b9a2016-11-18 19:59:23 +020062 read_spd (&spd[0], 0x50, id_only);
63 read_spd (&spd[2], 0x51, id_only);
Vladimir Serbinenko94930e22014-08-24 22:40:33 +020064}
Vladimir Serbinenko609bd942016-01-31 14:00:54 +010065
Arthur Heymans4c81d442018-01-29 12:14:37 +010066int mainboard_should_reset_usb(int s3resume)
67{
68 return !s3resume;
69}