Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2010 coresystems GmbH |
| 5 | * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. |
| 6 | * Copyright (C) 2014 Vladimir Serbinenko |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <stdint.h> |
| 19 | #include <string.h> |
| 20 | #include <lib.h> |
| 21 | #include <timestamp.h> |
| 22 | #include <arch/byteorder.h> |
| 23 | #include <arch/io.h> |
| 24 | #include <device/pci_def.h> |
| 25 | #include <device/pnp_def.h> |
| 26 | #include <cpu/x86/lapic.h> |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 27 | #include <arch/acpi.h> |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 28 | #include <console/console.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 29 | #include <northbridge/intel/sandybridge/sandybridge.h> |
Arthur Heymans | 4c81d44 | 2018-01-29 12:14:37 +0100 | [diff] [blame^] | 30 | #include <northbridge/intel/sandybridge/raminit.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 31 | #include <northbridge/intel/sandybridge/raminit_native.h> |
Arthur Heymans | d2d2aef | 2018-01-16 14:19:37 +0100 | [diff] [blame] | 32 | #include <southbridge/intel/common/rcba.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 33 | #include <southbridge/intel/bd82x6x/pch.h> |
Patrick Rudolph | e8e66f4 | 2016-02-06 17:42:42 +0100 | [diff] [blame] | 34 | #include <southbridge/intel/common/gpio.h> |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 35 | #include <arch/cpu.h> |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 36 | #include <cpu/x86/msr.h> |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 37 | |
Vladimir Serbinenko | fa1d688 | 2014-10-19 02:50:45 +0200 | [diff] [blame] | 38 | void pch_enable_lpc(void) |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 39 | { |
| 40 | /* X230 EC Decode Range Port60/64, Port62/66 */ |
| 41 | /* Enable EC, PS/2 Keyboard/Mouse */ |
| 42 | pci_write_config16(PCH_LPC_DEV, LPC_EN, |
Patrick Rudolph | 93eac6a | 2017-05-04 19:10:50 +0200 | [diff] [blame] | 43 | CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN); |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 44 | |
| 45 | pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x7c1601); |
| 46 | pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0xc15e1); |
| 47 | pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x0c06a1); |
| 48 | |
Patrick Rudolph | ac27d36 | 2017-05-04 19:00:33 +0200 | [diff] [blame] | 49 | pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000); |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 50 | } |
| 51 | |
Nico Huber | ff4025c | 2018-01-14 12:34:43 +0100 | [diff] [blame] | 52 | void mainboard_rcba_config(void) |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 53 | { |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 54 | RCBA32(BUC) = 0; |
| 55 | } |
| 56 | |
Arthur Heymans | 4c81d44 | 2018-01-29 12:14:37 +0100 | [diff] [blame^] | 57 | void mainboard_fill_pei_data(struct pei_data *pei_data) |
| 58 | { |
| 59 | struct pei_data pei_data_template = { |
| 60 | .pei_version = PEI_VERSION, |
| 61 | .mchbar = (uintptr_t)DEFAULT_MCHBAR, |
| 62 | .dmibar = (uintptr_t)DEFAULT_DMIBAR, |
| 63 | .epbar = DEFAULT_EPBAR, |
| 64 | .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, |
| 65 | .smbusbar = SMBUS_IO_BASE, |
| 66 | .wdbbar = 0x4000000, |
| 67 | .wdbsize = 0x1000, |
| 68 | .hpet_address = CONFIG_HPET_ADDRESS, |
| 69 | .rcba = (uintptr_t)DEFAULT_RCBABASE, |
| 70 | .pmbase = DEFAULT_PMBASE, |
| 71 | .gpiobase = DEFAULT_GPIOBASE, |
| 72 | .thermalbase = 0xfed08000, |
| 73 | .system_type = 0, // 0 Mobile, 1 Desktop/Server |
| 74 | .tseg_size = CONFIG_SMM_TSEG_SIZE, |
| 75 | .spd_addresses = { 0xa0, 0x00,0xa2,0x00 }, |
| 76 | .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, |
| 77 | .ec_present = 1, |
| 78 | .gbe_enable = 1, |
| 79 | // 0 = leave channel enabled |
| 80 | // 1 = disable dimm 0 on channel |
| 81 | // 2 = disable dimm 1 on channel |
| 82 | // 3 = disable dimm 0+1 on channel |
| 83 | .dimm_channel0_disabled = 2, |
| 84 | .dimm_channel1_disabled = 2, |
| 85 | .max_ddr3_freq = 1333, |
| 86 | .usb_port_config = { |
| 87 | { 1, 0, 0x0040 }, |
| 88 | { 1, 1, 0x0080 }, |
| 89 | { 1, 3, 0x0080 }, |
| 90 | { 1, 3, 0x0080 }, |
| 91 | { 1, 0, 0x0080 }, |
| 92 | { 1, 0, 0x0080 }, |
| 93 | { 1, 2, 0x0040 }, |
| 94 | { 1, 2, 0x0040 }, |
| 95 | { 1, 6, 0x0080 }, |
| 96 | { 1, 5, 0x0080 }, |
| 97 | { 1, 6, 0x0080 }, |
| 98 | { 1, 6, 0x0080 }, |
| 99 | { 1, 7, 0x0080 }, |
| 100 | { 1, 6, 0x0080 }, |
| 101 | }, |
| 102 | }; |
| 103 | *pei_data = pei_data_template; |
| 104 | } |
| 105 | |
Vladimir Serbinenko | fa1d688 | 2014-10-19 02:50:45 +0200 | [diff] [blame] | 106 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
| 107 | { 1, 0, 0 }, |
| 108 | { 1, 1, 1 }, |
| 109 | { 1, 1, 3 }, |
| 110 | { 1, 1, 3 }, |
| 111 | { 1, 1, -1 }, |
| 112 | { 1, 1, -1 }, |
| 113 | { 1, 0, 2 }, |
| 114 | { 1, 0, 2 }, |
| 115 | { 1, 1, 6 }, |
| 116 | { 1, 1, 5 }, |
| 117 | { 1, 1, 6 }, |
| 118 | { 1, 1, 6 }, |
| 119 | { 1, 1, 7 }, |
| 120 | { 1, 1, 6 }, |
| 121 | }; |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 122 | |
Kyösti Mälkki | e258b9a | 2016-11-18 19:59:23 +0200 | [diff] [blame] | 123 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
Jan Tatje | b874308 | 2016-06-04 19:29:03 +0200 | [diff] [blame] | 124 | { |
Kyösti Mälkki | e258b9a | 2016-11-18 19:59:23 +0200 | [diff] [blame] | 125 | read_spd (&spd[0], 0x50, id_only); |
| 126 | read_spd (&spd[2], 0x51, id_only); |
Vladimir Serbinenko | 94930e2 | 2014-08-24 22:40:33 +0200 | [diff] [blame] | 127 | } |
Vladimir Serbinenko | 609bd94 | 2016-01-31 14:00:54 +0100 | [diff] [blame] | 128 | |
Jan Tatje | b874308 | 2016-06-04 19:29:03 +0200 | [diff] [blame] | 129 | void mainboard_early_init(int s3resume) |
| 130 | { |
Vladimir Serbinenko | 609bd94 | 2016-01-31 14:00:54 +0100 | [diff] [blame] | 131 | } |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 132 | |
| 133 | void mainboard_config_superio(void) |
| 134 | { |
| 135 | } |
Arthur Heymans | 4c81d44 | 2018-01-29 12:14:37 +0100 | [diff] [blame^] | 136 | |
| 137 | int mainboard_should_reset_usb(int s3resume) |
| 138 | { |
| 139 | return !s3resume; |
| 140 | } |