blob: 8481446095c853105cd54f2e4509c592ecde23f6 [file] [log] [blame]
Lee Leahy77ff0b12015-05-05 15:07:29 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2013 Google Inc.
Lee Leahy32471722015-04-20 15:20:28 -07005 * Copyright (C) 2015 Intel Corp.
Lee Leahy77ff0b12015-05-05 15:07:29 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahy77ff0b12015-05-05 15:07:29 -070015 */
16
Lee Leahy32471722015-04-20 15:20:28 -070017#include "chip.h"
Lee Leahy77ff0b12015-05-05 15:07:29 -070018#include <arch/io.h>
19#include <console/console.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070020#include <device/device.h>
21#include <device/pci.h>
22#include <device/pci_ids.h>
Matt DeVillier132bbe62017-07-01 13:02:47 -050023#include <drivers/intel/gma/opregion.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070024#include <reg_script.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070025#include <soc/gfx.h>
Matt DeVillier132bbe62017-07-01 13:02:47 -050026#include <soc/nvs.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070027#include <soc/pci_devs.h>
28#include <soc/ramstage.h>
29
Lee Leahy77ff0b12015-05-05 15:07:29 -070030static const struct reg_script gpu_pre_vbios_script[] = {
31 /* Make sure GFX is bus master with MMIO access */
32 REG_PCI_OR32(PCI_COMMAND, PCI_COMMAND_MASTER|PCI_COMMAND_MEMORY),
Lee Leahy77ff0b12015-05-05 15:07:29 -070033 REG_SCRIPT_END
34};
35
36static const struct reg_script gfx_post_vbios_script[] = {
Lee Leahy77ff0b12015-05-05 15:07:29 -070037 /* Set Lock bits */
Lee Leahy32471722015-04-20 15:20:28 -070038 REG_PCI_RMW32(GGC, 0xffffffff, GGC_GGCLCK),
39 REG_PCI_RMW32(GSM_BASE, 0xffffffff, GSM_BDSM_LOCK),
40 REG_PCI_RMW32(GTT_BASE, 0xffffffff, GTT_BGSM_LOCK),
Lee Leahy77ff0b12015-05-05 15:07:29 -070041 REG_SCRIPT_END
42};
43
44static inline void gfx_run_script(device_t dev, const struct reg_script *ops)
45{
46 reg_script_run_on_dev(dev, ops);
47}
48
49static void gfx_pre_vbios_init(device_t dev)
50{
Lee Leahy32471722015-04-20 15:20:28 -070051 printk(BIOS_SPEW, "%s/%s ( %s )\n",
52 __FILE__, __func__, dev_name(dev));
Lee Leahy77ff0b12015-05-05 15:07:29 -070053 printk(BIOS_INFO, "GFX: Pre VBIOS Init\n");
54 gfx_run_script(dev, gpu_pre_vbios_script);
55}
56
Lee Leahy77ff0b12015-05-05 15:07:29 -070057static void gfx_post_vbios_init(device_t dev)
58{
Lee Leahy32471722015-04-20 15:20:28 -070059 printk(BIOS_SPEW, "%s/%s ( %s )\n",
60 __FILE__, __func__, dev_name(dev));
Lee Leahy77ff0b12015-05-05 15:07:29 -070061 printk(BIOS_INFO, "GFX: Post VBIOS Init\n");
62 gfx_run_script(dev, gfx_post_vbios_script);
63}
64
Lee Leahy77ff0b12015-05-05 15:07:29 -070065static void gfx_init(device_t dev)
66{
Lee Leahy32471722015-04-20 15:20:28 -070067 printk(BIOS_SPEW, "%s/%s ( %s )\n",
68 __FILE__, __func__, dev_name(dev));
69
Lee Leahy77ff0b12015-05-05 15:07:29 -070070 /* Pre VBIOS Init */
71 gfx_pre_vbios_init(dev);
72
Lee Leahy77ff0b12015-05-05 15:07:29 -070073 /* Run VBIOS */
74 pci_dev_init(dev);
75
76 /* Post VBIOS Init */
77 gfx_post_vbios_init(dev);
Matt DeVillier132bbe62017-07-01 13:02:47 -050078
79 intel_gma_restore_opregion();
80}
81
82uintptr_t gma_get_gnvs_aslb(const void *gnvs)
83{
84 const global_nvs_t *gnvs_ptr = gnvs;
85 return (uintptr_t)(gnvs_ptr ? gnvs_ptr->aslb : 0);
86}
87
88void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
89{
90 global_nvs_t *gnvs_ptr = gnvs;
91 if (gnvs_ptr)
92 gnvs_ptr->aslb = aslb;
Lee Leahy77ff0b12015-05-05 15:07:29 -070093}
94
95static struct device_operations gfx_device_ops = {
Nico Huber1ef80142015-11-05 23:27:06 +010096 .read_resources = pci_dev_read_resources,
Lee Leahy77ff0b12015-05-05 15:07:29 -070097 .set_resources = pci_dev_set_resources,
98 .enable_resources = pci_dev_enable_resources,
99 .init = gfx_init,
100 .ops_pci = &soc_pci_ops,
101};
102
103static const struct pci_driver gfx_driver __pci_driver = {
104 .ops = &gfx_device_ops,
105 .vendor = PCI_VENDOR_ID_INTEL,
106 .device = GFX_DEVID,
107};