Angel Pons | 0612b27 | 2020-04-05 15:46:56 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 5 | #include <console/console.h> |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
Tim Wawrzynczak | 6c6eb65 | 2021-07-01 09:03:51 -0600 | [diff] [blame] | 8 | #include <intelblocks/acpi.h> |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 9 | #include <intelblocks/pmc.h> |
| 10 | #include <soc/pci_devs.h> |
| 11 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 12 | static void pch_pmc_add_new_resource(struct device *dev, |
| 13 | uint8_t offset, uintptr_t base, size_t size, |
| 14 | unsigned long flags) |
| 15 | { |
| 16 | struct resource *res; |
| 17 | res = new_resource(dev, offset); |
| 18 | res->base = base; |
| 19 | res->size = size; |
| 20 | res->flags = flags; |
| 21 | } |
| 22 | |
| 23 | static void pch_pmc_add_mmio_resources(struct device *dev, |
| 24 | const struct pmc_resource_config *cfg) |
| 25 | { |
| 26 | pch_pmc_add_new_resource(dev, cfg->pwrmbase_offset, |
| 27 | cfg->pwrmbase_addr, cfg->pwrmbase_size, |
| 28 | IORESOURCE_MEM | IORESOURCE_ASSIGNED | |
| 29 | IORESOURCE_FIXED | IORESOURCE_RESERVE); |
| 30 | } |
| 31 | |
| 32 | static void pch_pmc_add_io_resources(struct device *dev, |
| 33 | const struct pmc_resource_config *cfg) |
| 34 | { |
| 35 | pch_pmc_add_new_resource(dev, cfg->abase_offset, |
| 36 | cfg->abase_addr, cfg->abase_size, |
| 37 | IORESOURCE_IO | IORESOURCE_ASSIGNED | |
| 38 | IORESOURCE_FIXED); |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 39 | if (CONFIG(PMC_INVALID_READ_AFTER_WRITE)) { |
Hannah Williams | 1177bf5 | 2017-12-13 12:44:26 -0800 | [diff] [blame] | 40 | /* |
| 41 | * The ACPI IO BAR (offset 0x20) is not PCI compliant. We've |
| 42 | * observed cases where the BAR reads back as 0, but the IO |
| 43 | * window is open. This also means that it will not respond |
| 44 | * to PCI probing. |
| 45 | */ |
| 46 | pci_write_config16(dev, cfg->abase_offset, cfg->abase_addr); |
| 47 | /* |
| 48 | * In pci_dev_enable_resources, reading IO SPACE ACCESS bit in |
| 49 | * STATUSCOMMAND register does not read back the written |
| 50 | * value correctly, hence IO access gets disabled. This is |
| 51 | * seen in some PMC devices, hence this code makes sure |
| 52 | * IO access is available. |
| 53 | */ |
| 54 | dev->command |= PCI_COMMAND_IO; |
| 55 | } |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | static void pch_pmc_read_resources(struct device *dev) |
| 59 | { |
| 60 | struct pmc_resource_config pmc_cfg; |
| 61 | struct pmc_resource_config *config = &pmc_cfg; |
| 62 | |
| 63 | if (pmc_soc_get_resources(config) < 0) |
Keith Short | 15588b0 | 2019-05-09 11:40:34 -0600 | [diff] [blame] | 64 | die_with_post_code(POST_HW_INIT_FAILURE, |
| 65 | "Unable to get PMC controller resource information!"); |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 66 | |
| 67 | /* Get the normal PCI resources of this device. */ |
| 68 | pci_dev_read_resources(dev); |
| 69 | |
| 70 | /* Add non-standard MMIO resources. */ |
| 71 | pch_pmc_add_mmio_resources(dev, config); |
| 72 | |
| 73 | /* Add IO resources. */ |
| 74 | pch_pmc_add_io_resources(dev, config); |
| 75 | } |
| 76 | |
Tim Wawrzynczak | 6c6eb65 | 2021-07-01 09:03:51 -0600 | [diff] [blame] | 77 | static void pmc_fill_ssdt(const struct device *dev) |
| 78 | { |
| 79 | if (CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_PEP)) |
| 80 | generate_acpi_power_engine(); |
| 81 | } |
| 82 | |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 83 | static struct device_operations device_ops = { |
Elyes HAOUAS | 1d19127 | 2018-11-27 12:23:48 +0100 | [diff] [blame] | 84 | .read_resources = pch_pmc_read_resources, |
| 85 | .set_resources = pci_dev_set_resources, |
| 86 | .enable_resources = pci_dev_enable_resources, |
| 87 | .init = pmc_soc_init, |
Subrata Banik | 6bbc91a | 2017-12-07 14:55:51 +0530 | [diff] [blame] | 88 | .ops_pci = &pci_dev_ops_pci, |
Nico Huber | 51b75ae | 2019-03-14 16:02:05 +0100 | [diff] [blame] | 89 | .scan_bus = scan_static_bus, |
Tim Wawrzynczak | 6c6eb65 | 2021-07-01 09:03:51 -0600 | [diff] [blame] | 90 | #if CONFIG(HAVE_ACPI_TABLES) |
| 91 | .acpi_fill_ssdt = pmc_fill_ssdt, |
| 92 | #endif |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | static const unsigned short pci_device_ids[] = { |
| 96 | PCI_DEVICE_ID_INTEL_SPT_LP_PMC, |
V Sowmya | 7c15047 | 2018-01-23 14:44:45 +0530 | [diff] [blame] | 97 | PCI_DEVICE_ID_INTEL_SPT_H_PMC, |
Maxim Polyakov | 571d07d | 2019-08-22 13:11:32 +0300 | [diff] [blame] | 98 | PCI_DEVICE_ID_INTEL_LWB_PMC, |
| 99 | PCI_DEVICE_ID_INTEL_LWB_PMC_SUPER, |
Angel Pons | f530e36 | 2021-04-27 10:20:04 +0200 | [diff] [blame] | 100 | PCI_DEVICE_ID_INTEL_UPT_H_PMC, |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 101 | PCI_DEVICE_ID_INTEL_APL_PMC, |
| 102 | PCI_DEVICE_ID_INTEL_GLK_PMC, |
praveen hodagatta pranesh | e26c4a4 | 2018-09-20 03:49:45 +0800 | [diff] [blame] | 103 | PCI_DEVICE_ID_INTEL_CNP_H_PMC, |
Aamir Bohra | 9eac039 | 2018-06-30 12:07:04 +0530 | [diff] [blame] | 104 | PCI_DEVICE_ID_INTEL_ICP_PMC, |
Ronak Kanabar | da7ffb48 | 2019-02-05 01:51:13 +0530 | [diff] [blame] | 105 | PCI_DEVICE_ID_INTEL_CMP_PMC, |
Gaggery Tsai | 12a651c | 2019-12-05 11:23:20 -0800 | [diff] [blame] | 106 | PCI_DEVICE_ID_INTEL_CMP_H_PMC, |
Ravi Sarawadi | 6b5bf40 | 2019-10-21 22:25:04 -0700 | [diff] [blame] | 107 | PCI_DEVICE_ID_INTEL_TGP_PMC, |
Jeremy Soller | 191a8d7 | 2021-08-10 14:06:51 -0600 | [diff] [blame] | 108 | PCI_DEVICE_ID_INTEL_TGP_H_PMC, |
Tan, Lean Sheng | 2613609 | 2020-01-20 19:13:56 -0800 | [diff] [blame] | 109 | PCI_DEVICE_ID_INTEL_MCC_PMC, |
Meera Ravindranath | 3f4af0d | 2020-02-12 16:01:22 +0530 | [diff] [blame] | 110 | PCI_DEVICE_ID_INTEL_JSP_PMC, |
Subrata Banik | f672f7f | 2020-08-03 14:29:25 +0530 | [diff] [blame] | 111 | PCI_DEVICE_ID_INTEL_ADP_P_PMC, |
| 112 | PCI_DEVICE_ID_INTEL_ADP_S_PMC, |
Usha P | af5a9d6 | 2022-01-17 20:24:31 +0530 | [diff] [blame^] | 113 | PCI_DEVICE_ID_INTEL_ADP_M_N_PMC, |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 114 | 0 |
| 115 | }; |
| 116 | |
Subrata Banik | 8885206 | 2018-01-10 10:51:50 +0530 | [diff] [blame] | 117 | static const struct pci_driver pch_pmc __pci_driver = { |
Subrata Banik | 2153ea5 | 2017-11-22 15:38:19 +0530 | [diff] [blame] | 118 | .ops = &device_ops, |
| 119 | .vendor = PCI_VENDOR_ID_INTEL, |
| 120 | .devices = pci_device_ids, |
| 121 | }; |