Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 13 | */ |
| 14 | |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 15 | #include "chip.h" |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 16 | #include <console/console.h> |
| 17 | #include <device/device.h> |
| 18 | #include <device/pci.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 19 | #include <device/pci_ops.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 20 | #include <device/pciexp.h> |
| 21 | #include <device/pci_ids.h> |
| 22 | #include <reg_script.h> |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 23 | #include <soc/pci_devs.h> |
| 24 | #include <soc/pcie.h> |
| 25 | #include <soc/ramstage.h> |
| 26 | #include <soc/smm.h> |
| 27 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 28 | static int pll_en_off; |
| 29 | static uint32_t strpfusecfg; |
| 30 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 31 | static inline int root_port_offset(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 32 | { |
| 33 | return PCI_FUNC(dev->path.pci.devfn); |
| 34 | } |
| 35 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 36 | static inline int is_first_port(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 37 | { |
| 38 | return root_port_offset(dev) == PCIE_PORT1_FUNC; |
| 39 | } |
| 40 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 41 | static void pcie_init(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 42 | { |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 43 | printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | static const struct reg_script no_dev_behind_port[] = { |
| 47 | REG_PCI_OR32(PCIEALC, (1 << 26)), |
| 48 | REG_PCI_POLL32(PCIESTS1, 0x1f000000, (1 << 24), 50000), |
| 49 | REG_PCI_OR32(PHYCTL4, SQDIS), |
| 50 | REG_SCRIPT_END, |
| 51 | }; |
| 52 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 53 | static void check_port_enabled(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 54 | { |
| 55 | int rp_config = (strpfusecfg & LANECFG_MASK) >> LANECFG_SHIFT; |
| 56 | |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 57 | printk(BIOS_SPEW, "%s/%s (%s)\n", |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 58 | __FILE__, __func__, dev_name(dev)); |
| 59 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 60 | switch (root_port_offset(dev)) { |
| 61 | case PCIE_PORT1_FUNC: |
| 62 | /* Port 1 cannot be disabled from strapping config. */ |
| 63 | break; |
| 64 | case PCIE_PORT2_FUNC: |
| 65 | /* Port 2 disabled in all configs but 4x1. */ |
| 66 | if (rp_config != 0x0) |
| 67 | dev->enabled = 0; |
| 68 | break; |
| 69 | case PCIE_PORT3_FUNC: |
| 70 | /* Port 3 disabled only in 1x4 config. */ |
| 71 | if (rp_config == 0x3) |
| 72 | dev->enabled = 0; |
| 73 | break; |
| 74 | case PCIE_PORT4_FUNC: |
| 75 | /* Port 4 disabled in 1x4 and 2x2 config. */ |
| 76 | if (rp_config >= 0x2) |
| 77 | dev->enabled = 0; |
| 78 | break; |
| 79 | } |
| 80 | } |
| 81 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 82 | static void check_device_present(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 83 | { |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 84 | /* port1_dev will store the dev struct pointer of the PORT1 */ |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 85 | static struct device *port1_dev; |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 86 | |
| 87 | /* |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 88 | * The SOC has 4 ROOT ports defined with MAX_ROOT_PORTS_BSW. For each port initial |
| 89 | * assumption is that, each port will have devices connected to it. Later we will |
| 90 | * scan each PORT and if the device is not attached to that port we will update |
| 91 | * rootports_in_use. If none of the root port is in use we will disable PORT1 |
| 92 | * otherwise we will keep PORT1 enabled per spec. In future if the SoC has more |
| 93 | * number of PCIe Root ports then change MAX_ROOT_PORTS_BSW value accordingly. |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 94 | */ |
| 95 | |
| 96 | static uint32_t rootports_in_use = MAX_ROOT_PORTS_BSW; |
| 97 | |
Elyes HAOUAS | a342f39 | 2018-10-17 10:56:26 +0200 | [diff] [blame] | 98 | printk(BIOS_SPEW, "%s/%s (%s)\n", |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 99 | __FILE__, __func__, dev_name(dev)); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 100 | /* Set slot implemented. */ |
| 101 | pci_write_config32(dev, XCAP, pci_read_config32(dev, XCAP) | SI); |
| 102 | |
| 103 | /* No device present. */ |
| 104 | if (!(pci_read_config32(dev, SLCTL_SLSTS) & PDS)) { |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 105 | rootports_in_use--; |
| 106 | printk(BIOS_DEBUG, "No PCIe device present."); |
| 107 | |
| 108 | /* |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 109 | * Defer PORT1 disabling for now. When we are at Last port we will check |
| 110 | * rootports_in_use and disable PORT1 if none of the ports have any device |
| 111 | * connected to it. |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 112 | */ |
| 113 | if (!is_first_port(dev)) { |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 114 | reg_script_run_on_dev(dev, no_dev_behind_port); |
| 115 | dev->enabled = 0; |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 116 | } else |
| 117 | port1_dev = dev; |
| 118 | /* |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 119 | * If none of the ROOT PORT has devices connected then disable PORT1. |
| 120 | * Else, keep the PORT1 enabled. |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 121 | */ |
| 122 | if (!rootports_in_use) { |
| 123 | reg_script_run_on_dev(port1_dev, no_dev_behind_port); |
| 124 | port1_dev->enabled = 0; |
| 125 | southcluster_enable_dev(port1_dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 126 | } |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 127 | } else if (!dev->enabled) { |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 128 | /* Port is disabled, but device present. Disable link. */ |
| 129 | pci_write_config32(dev, LCTL, |
| 130 | pci_read_config32(dev, LCTL) | LD); |
| 131 | } |
| 132 | } |
| 133 | |
Elyes HAOUAS | b13fac3 | 2018-05-24 22:29:44 +0200 | [diff] [blame] | 134 | static void pcie_enable(struct device *dev) |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 135 | { |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 136 | printk(BIOS_SPEW, "%s/%s (%s)\n", __FILE__, __func__, dev_name(dev)); |
| 137 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 138 | if (is_first_port(dev)) { |
Kyösti Mälkki | 8950cfb | 2019-07-13 22:16:25 +0300 | [diff] [blame] | 139 | struct soc_intel_braswell_config *config = config_of(dev); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 140 | uint32_t reg = pci_read_config32(dev, PHYCTL2_IOSFBCTL); |
| 141 | pll_en_off = !!(reg & PLL_OFF_EN); |
| 142 | |
| 143 | strpfusecfg = pci_read_config32(dev, STRPFUSECFG); |
| 144 | |
Kyösti Mälkki | 8950cfb | 2019-07-13 22:16:25 +0300 | [diff] [blame] | 145 | if (config->pcie_wake_enable) |
Angel Pons | aee7ab2 | 2020-03-19 00:31:58 +0100 | [diff] [blame^] | 146 | smm_southcluster_save_param(SMM_SAVE_PARAM_PCIE_WAKE_ENABLE, 1); |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 147 | } |
| 148 | |
| 149 | /* Check if device is enabled in strapping. */ |
| 150 | check_port_enabled(dev); |
| 151 | /* Determine if device is behind port. */ |
| 152 | check_device_present(dev); |
| 153 | |
| 154 | southcluster_enable_dev(dev); |
| 155 | } |
| 156 | |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 157 | static struct pci_operations pcie_root_ops = { |
Kyösti Mälkki | 2520032 | 2019-03-20 18:36:37 +0200 | [diff] [blame] | 158 | .set_subsystem = pci_dev_set_subsystem, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 159 | }; |
| 160 | |
| 161 | static struct device_operations device_ops = { |
| 162 | .read_resources = pci_bus_read_resources, |
| 163 | .set_resources = pci_dev_set_resources, |
| 164 | .enable_resources = pci_bus_enable_resources, |
Lee Leahy | 3247172 | 2015-04-20 15:20:28 -0700 | [diff] [blame] | 165 | .init = pcie_init, |
| 166 | .scan_bus = pciexp_scan_bridge, |
| 167 | .enable = pcie_enable, |
Lee Leahy | 77ff0b1 | 2015-05-05 15:07:29 -0700 | [diff] [blame] | 168 | .ops_pci = &pcie_root_ops, |
| 169 | }; |
| 170 | |
| 171 | static const unsigned short pci_device_ids[] = { |
| 172 | PCIE_PORT1_DEVID, PCIE_PORT2_DEVID, PCIE_PORT3_DEVID, PCIE_PORT4_DEVID, |
| 173 | 0 |
| 174 | }; |
| 175 | |
| 176 | static const struct pci_driver pcie_root_ports __pci_driver = { |
| 177 | .ops = &device_ops, |
| 178 | .vendor = PCI_VENDOR_ID_INTEL, |
| 179 | .devices = pci_device_ids, |
| 180 | }; |