Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 4 | * |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #define __SIMPLE_DEVICE__ |
| 16 | |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 17 | #include <assert.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 18 | #include <stdint.h> |
Elyes HAOUAS | 20eaef0 | 2019-03-29 17:45:28 +0100 | [diff] [blame] | 19 | #include <console/console.h> |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 20 | #include <cpu/x86/msr.h> |
Kyösti Mälkki | b2a5f0b | 2019-08-04 19:54:32 +0300 | [diff] [blame] | 21 | #include <cpu/x86/smm.h> |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 22 | #include <cpu/amd/msr.h> |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 23 | #include <cpu/amd/mtrr.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 24 | #include <cbmem.h> |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 25 | #include <arch/bert_storage.h> |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 26 | #include <soc/northbridge.h> |
Marshall Dawson | 69486ca | 2019-05-02 12:03:45 -0600 | [diff] [blame] | 27 | #include <soc/iomap.h> |
| 28 | #include <amdblocks/acpimmio.h> |
Marc Jones | 1587dc8 | 2017-05-15 18:55:11 -0600 | [diff] [blame] | 29 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 30 | #if CONFIG(ACPI_BERT) |
Marshall Dawson | f0de242 | 2018-09-10 13:28:49 -0600 | [diff] [blame] | 31 | #if CONFIG_SMM_TSEG_SIZE == 0x0 |
| 32 | #define BERT_REGION_MAX_SIZE 0x100000 |
| 33 | #else |
| 34 | /* SMM_TSEG_SIZE must stay on a boundary appropriate for its granularity */ |
| 35 | #define BERT_REGION_MAX_SIZE CONFIG_SMM_TSEG_SIZE |
| 36 | #endif |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 37 | #else |
Marshall Dawson | f0de242 | 2018-09-10 13:28:49 -0600 | [diff] [blame] | 38 | #define BERT_REGION_MAX_SIZE 0 |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 39 | #endif |
| 40 | |
| 41 | void bert_reserved_region(void **start, size_t *size) |
| 42 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 43 | if (CONFIG(ACPI_BERT)) |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 44 | *start = cbmem_top(); |
| 45 | else |
| 46 | start = NULL; |
| 47 | *size = BERT_REGION_MAX_SIZE; |
| 48 | } |
| 49 | |
Arthur Heymans | 340e4b8 | 2019-10-23 17:25:58 +0200 | [diff] [blame] | 50 | void *cbmem_top_chipset(void) |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 51 | { |
| 52 | msr_t tom = rdmsr(TOP_MEM); |
| 53 | |
| 54 | if (!tom.lo) |
| 55 | return 0; |
Richard Spiegel | 8c614f2 | 2018-10-23 14:53:23 -0700 | [diff] [blame] | 56 | |
| 57 | /* 8MB alignment to keep MTRR usage low */ |
| 58 | return (void *)ALIGN_DOWN(restore_top_of_low_cacheable() |
| 59 | - CONFIG_SMM_TSEG_SIZE |
| 60 | - BERT_REGION_MAX_SIZE, 8*MiB); |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 61 | } |
| 62 | |
| 63 | static uintptr_t smm_region_start(void) |
| 64 | { |
Marshall Dawson | 4b0f6fa | 2018-09-04 13:08:25 -0600 | [diff] [blame] | 65 | return (uintptr_t)cbmem_top() + BERT_REGION_MAX_SIZE; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | static size_t smm_region_size(void) |
| 69 | { |
| 70 | return CONFIG_SMM_TSEG_SIZE; |
| 71 | } |
| 72 | |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 73 | /* |
| 74 | * For data stored in TSEG, ensure TValid is clear so R/W access can reach |
| 75 | * the DRAM when not in SMM. |
| 76 | */ |
| 77 | static void clear_tvalid(void) |
| 78 | { |
| 79 | msr_t hwcr = rdmsr(HWCR_MSR); |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 80 | msr_t mask = rdmsr(SMM_MASK_MSR); |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 81 | int tvalid = !!(mask.lo & SMM_TSEG_VALID); |
| 82 | |
| 83 | if (hwcr.lo & SMM_LOCK) { |
| 84 | if (!tvalid) /* not valid but locked means still accessible */ |
| 85 | return; |
| 86 | |
| 87 | printk(BIOS_ERR, "Error: can't clear TValid, already locked\n"); |
| 88 | return; |
| 89 | } |
| 90 | |
| 91 | mask.lo &= ~SMM_TSEG_VALID; |
Elyes HAOUAS | 400ce55 | 2018-10-12 10:54:30 +0200 | [diff] [blame] | 92 | wrmsr(SMM_MASK_MSR, mask); |
Marshall Dawson | f3c57a7c | 2018-01-29 18:08:16 -0700 | [diff] [blame] | 93 | } |
| 94 | |
Kyösti Mälkki | 4913d8a | 2019-08-05 12:49:09 +0300 | [diff] [blame] | 95 | void smm_region(uintptr_t *start, size_t *size) |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 96 | { |
Kyösti Mälkki | 544369e | 2019-08-06 22:14:34 +0300 | [diff] [blame] | 97 | static int once; |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 98 | |
Kyösti Mälkki | 4913d8a | 2019-08-05 12:49:09 +0300 | [diff] [blame] | 99 | *start = smm_region_start(); |
| 100 | *size = smm_region_size(); |
Marshall Dawson | b617211 | 2017-09-13 17:47:31 -0600 | [diff] [blame] | 101 | |
Kyösti Mälkki | 544369e | 2019-08-06 22:14:34 +0300 | [diff] [blame] | 102 | if (!once) { |
| 103 | clear_tvalid(); |
| 104 | once = 1; |
| 105 | } |
Marshall Dawson | 94ee937 | 2017-06-15 12:18:23 -0600 | [diff] [blame] | 106 | } |