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Uwe Hermannc73fca32008-12-05 14:15:17 +00001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
Uwe Hermannc73fca32008-12-05 14:15:17 +000021#include <stdint.h>
22#include <device/pci_def.h>
23#include <arch/io.h>
24#include <device/pnp_def.h>
25#include <arch/romcc_io.h>
26#include <arch/hlt.h>
27#include <stdlib.h>
Patrick Georgi12584e22010-05-08 09:14:51 +000028#include <console/console.h>
Uwe Hermannc73fca32008-12-05 14:15:17 +000029#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
30#include "northbridge/intel/i82810/raminit.h"
Uwe Hermannc73fca32008-12-05 14:15:17 +000031#include "cpu/x86/bist.h"
Stefan Reinauer138be832010-02-27 01:50:21 +000032#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
Uwe Hermannc73fca32008-12-05 14:15:17 +000033#include "pc80/udelay_io.c"
34#include "northbridge/intel/i82810/raminit.c"
Uwe Hermannab50d622010-10-13 08:21:44 +000035#include <lib.h>
Uwe Hermannc73fca32008-12-05 14:15:17 +000036
37#define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
38
Uwe Hermannab50d622010-10-13 08:21:44 +000039void main(unsigned long bist)
Uwe Hermannc73fca32008-12-05 14:15:17 +000040{
Stefan Reinauer08670622009-06-30 15:17:49 +000041 smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
Uwe Hermannc73fca32008-12-05 14:15:17 +000042 uart_init();
43 console_init();
Uwe Hermannc73fca32008-12-05 14:15:17 +000044 enable_smbus();
Uwe Hermannc73fca32008-12-05 14:15:17 +000045 report_bist_failure(bist);
Uwe Hermannc73fca32008-12-05 14:15:17 +000046 /* dump_spd_registers(); */
47 sdram_set_registers();
48 sdram_set_spd_registers();
49 sdram_enable();
Uwe Hermannc73fca32008-12-05 14:15:17 +000050}