Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 6 | * |
| 7 | * Copyright (C) 2006 MSI |
| 8 | * Written by Bingxun Shi <bingxunshi@gmail.com> for MSI. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include <console/console.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_ids.h> |
| 24 | #include <string.h> |
| 25 | #include <stdint.h> |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 26 | #include <cpu/amd/multicore.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 27 | |
| 28 | #include <cpu/amd/amdk8_sysconf.h> |
| 29 | |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 30 | #include <stdlib.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 31 | #include "mb_sysconf.h" |
| 32 | |
| 33 | // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables |
| 34 | struct mb_sysconf_t mb_sysconf; |
| 35 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 36 | unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not |
| 37 | //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail |
| 38 | 0x0000ff0, |
| 39 | 0x0000ff0, |
| 40 | 0x0000ff0, |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 41 | // 0x0000ff0, |
| 42 | // 0x0000ff0, |
| 43 | // 0x0000ff0, |
| 44 | // 0x0000ff0, |
| 45 | // 0x0000ff0 |
| 46 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 47 | |
| 48 | unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most |
| 49 | 0x20202020, |
| 50 | 0x20202020, |
| 51 | 0x20202020, |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 52 | // 0x20202020, |
| 53 | // 0x20202020, |
| 54 | // 0x20202020, |
| 55 | // 0x20202020, |
| 56 | // 0x20202020, |
| 57 | }; |
| 58 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 59 | static unsigned get_bus_conf_done = 0; |
| 60 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 61 | void get_bus_conf(void) |
| 62 | { |
| 63 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 64 | unsigned apicid_base; |
| 65 | struct mb_sysconf_t *m; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 66 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 67 | device_t dev; |
| 68 | int i; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 69 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 70 | if (get_bus_conf_done == 1) |
| 71 | return; //do it only once |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 72 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 73 | get_bus_conf_done = 1; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 74 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 75 | sysconf.mb = &mb_sysconf; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 76 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 77 | m = sysconf.mb; |
| 78 | memset(m, 0, sizeof(struct mb_sysconf_t)); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 79 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 80 | sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); |
| 81 | for (i = 0; i < sysconf.hc_possible_num; i++) { |
| 82 | sysconf.pci1234[i] = pci1234x[i]; |
| 83 | sysconf.hcdn[i] = hcdnx[i]; |
| 84 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 85 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 86 | get_sblk_pci1234(); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 87 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 88 | sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 89 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 90 | m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 91 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 92 | /* MCP55 */ |
| 93 | dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06, 0)); |
| 94 | if (dev) { |
| 95 | m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 96 | } else { |
| 97 | printk(BIOS_DEBUG, |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 98 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 99 | sysconf.sbdn + 0x06); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 100 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 101 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 102 | for (i = 2; i < 8; i++) { |
| 103 | dev = |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 104 | dev_find_slot(m->bus_mcp55[0], |
| 105 | PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0)); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 106 | if (dev) { |
| 107 | m->bus_mcp55[i] = |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 108 | pci_read_config8(dev, PCI_SECONDARY_BUS); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 109 | } else { |
| 110 | printk(BIOS_DEBUG, |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 111 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 112 | m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 113 | } |
| 114 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 115 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 116 | /*I/O APICs: APIC ID Version State Address*/ |
Timothy Pearson | d4bbfe8 | 2015-10-27 16:48:36 -0500 | [diff] [blame] | 117 | if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) |
| 118 | apicid_base = get_apicid_base(1); |
| 119 | else |
| 120 | apicid_base = CONFIG_MAX_PHYSICAL_CPUS; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 121 | m->apicid_mcp55 = apicid_base + 0; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 122 | |
| 123 | } |