Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 AMD |
| 5 | * Written by Yinghai Lu <yinghailu@amd.com> for AMD. |
| 6 | * |
| 7 | * Copyright (C) 2006 MSI |
| 8 | * Written by Bingxun Shi <bingxunshi@gmail.com> for MSI. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; either version 2 of the License, or |
| 13 | * (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
Patrick Georgi | b890a12 | 2015-03-26 15:17:45 +0100 | [diff] [blame] | 22 | * Foundation, Inc. |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #include <console/console.h> |
| 26 | #include <device/pci.h> |
| 27 | #include <device/pci_ids.h> |
| 28 | #include <string.h> |
| 29 | #include <stdint.h> |
Stefan Reinauer | 9a16e3e | 2010-03-29 14:45:36 +0000 | [diff] [blame] | 30 | #include <cpu/amd/multicore.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 31 | |
| 32 | #include <cpu/amd/amdk8_sysconf.h> |
| 33 | |
Carl-Daniel Hailfinger | 2ee6779 | 2008-10-01 12:52:52 +0000 | [diff] [blame] | 34 | #include <stdlib.h> |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 35 | #include "mb_sysconf.h" |
| 36 | |
| 37 | // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables |
| 38 | struct mb_sysconf_t mb_sysconf; |
| 39 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 40 | unsigned pci1234x[] = { //Here you only need to set value in pci1234 for HT-IO that could be installed or not |
| 41 | //You may need to preset pci1234 for HTIO board, please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail |
| 42 | 0x0000ff0, |
| 43 | 0x0000ff0, |
| 44 | 0x0000ff0, |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 45 | // 0x0000ff0, |
| 46 | // 0x0000ff0, |
| 47 | // 0x0000ff0, |
| 48 | // 0x0000ff0, |
| 49 | // 0x0000ff0 |
| 50 | }; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 51 | |
| 52 | unsigned hcdnx[] = { //HT Chain device num, actually it is unit id base of every ht device in chain, assume every chain only have 4 ht device at most |
| 53 | 0x20202020, |
| 54 | 0x20202020, |
| 55 | 0x20202020, |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 56 | // 0x20202020, |
| 57 | // 0x20202020, |
| 58 | // 0x20202020, |
| 59 | // 0x20202020, |
| 60 | // 0x20202020, |
| 61 | }; |
| 62 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 63 | static unsigned get_bus_conf_done = 0; |
| 64 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 65 | void get_bus_conf(void) |
| 66 | { |
| 67 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 68 | unsigned apicid_base; |
| 69 | struct mb_sysconf_t *m; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 70 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 71 | device_t dev; |
| 72 | int i; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 73 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 74 | if (get_bus_conf_done == 1) |
| 75 | return; //do it only once |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 76 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 77 | get_bus_conf_done = 1; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 78 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 79 | sysconf.mb = &mb_sysconf; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 80 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 81 | m = sysconf.mb; |
| 82 | memset(m, 0, sizeof(struct mb_sysconf_t)); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 83 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 84 | sysconf.hc_possible_num = ARRAY_SIZE(pci1234x); |
| 85 | for (i = 0; i < sysconf.hc_possible_num; i++) { |
| 86 | sysconf.pci1234[i] = pci1234x[i]; |
| 87 | sysconf.hcdn[i] = hcdnx[i]; |
| 88 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 89 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 90 | get_sblk_pci1234(); |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 91 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 92 | sysconf.sbdn = (sysconf.hcdn[0] & 0xff); // first byte of first chain |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 93 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 94 | m->bus_mcp55[0] = (sysconf.pci1234[0] >> 16) & 0xff; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 95 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 96 | /* MCP55 */ |
| 97 | dev = dev_find_slot(m->bus_mcp55[0], PCI_DEVFN(sysconf.sbdn + 0x06, 0)); |
| 98 | if (dev) { |
| 99 | m->bus_mcp55[1] = pci_read_config8(dev, PCI_SECONDARY_BUS); |
| 100 | } else { |
| 101 | printk(BIOS_DEBUG, |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 102 | "ERROR - could not find PCI 1:%02x.0, using defaults\n", |
| 103 | sysconf.sbdn + 0x06); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 104 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 105 | |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 106 | for (i = 2; i < 8; i++) { |
| 107 | dev = |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 108 | dev_find_slot(m->bus_mcp55[0], |
| 109 | PCI_DEVFN(sysconf.sbdn + 0x0a + i - 2, 0)); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 110 | if (dev) { |
| 111 | m->bus_mcp55[i] = |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 112 | pci_read_config8(dev, PCI_SECONDARY_BUS); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 113 | } else { |
| 114 | printk(BIOS_DEBUG, |
Elyes HAOUAS | d36905c | 2014-07-23 09:23:29 +0200 | [diff] [blame] | 115 | "ERROR - could not find PCI %02x:%02x.0, using defaults\n", |
| 116 | m->bus_mcp55[0], sysconf.sbdn + 0x0a + i - 2); |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 117 | } |
| 118 | } |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 119 | |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 120 | /*I/O APICs: APIC ID Version State Address*/ |
Timothy Pearson | d4bbfe8 | 2015-10-27 16:48:36 -0500 | [diff] [blame^] | 121 | if (IS_ENABLED(CONFIG_LOGICAL_CPUS)) |
| 122 | apicid_base = get_apicid_base(1); |
| 123 | else |
| 124 | apicid_base = CONFIG_MAX_PHYSICAL_CPUS; |
Paul Menzel | 6a4e9b5 | 2013-10-18 09:42:55 +0200 | [diff] [blame] | 125 | m->apicid_mcp55 = apicid_base + 0; |
Bingxun Shi | fb1fddb | 2007-02-09 00:26:10 +0000 | [diff] [blame] | 126 | |
| 127 | } |