blob: 29ffb61f5c671017efcd909b62a9e4a42a267ed0 [file] [log] [blame]
Lee Leahyc4210412015-06-29 11:37:56 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2010 coresystems GmbH
5 * Copyright (C) 2014 Google Inc.
6 * Copyright (C) 2015 Intel Corporation.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Lee Leahyc4210412015-06-29 11:37:56 -070016 */
17
Lee Leahyc4210412015-06-29 11:37:56 -070018#include <string.h>
pchandrie57e7262015-09-14 14:11:38 -070019#include <gpio.h>
Lee Leahyc4210412015-06-29 11:37:56 -070020#include <soc/pei_data.h>
21#include <soc/pei_wrapper.h>
Lee Leahyc4210412015-06-29 11:37:56 -070022#include <soc/romstage.h>
Wenkai Du1105fad2015-08-21 13:11:00 -070023#include "gpio.h"
Lee Leahyc4210412015-06-29 11:37:56 -070024#include "spd/spd.h"
25
26void mainboard_romstage_entry(struct romstage_params *params)
27{
Rizwan Qureshi5ff73902016-08-24 20:50:54 +053028 params->pei_data->mem_cfg_id = get_spd_index();
Lee Leahyc4210412015-06-29 11:37:56 -070029 /* Fill out PEI DATA */
30 mainboard_fill_pei_data(params->pei_data);
31 mainboard_fill_spd_data(params->pei_data);
32 /* Initliaze memory */
33 romstage_common(params);
34}
35
Duncan Laurie74b964e2015-09-04 10:41:02 -070036void mainboard_memory_init_params(struct romstage_params *params,
37 MEMORY_INIT_UPD *memory_params)
Lee Leahyc4210412015-06-29 11:37:56 -070038{
39 if (params->pei_data->spd_data[0][0][0] != 0) {
40 memory_params->MemorySpdPtr00 =
41 (UINT32)(params->pei_data->spd_data[0][0]);
42 memory_params->MemorySpdPtr10 =
43 (UINT32)(params->pei_data->spd_data[1][0]);
Lee Leahyc4210412015-06-29 11:37:56 -070044 }
45 memcpy(memory_params->DqByteMapCh0, params->pei_data->dq_map[0],
46 sizeof(params->pei_data->dq_map[0]));
47 memcpy(memory_params->DqByteMapCh1, params->pei_data->dq_map[1],
48 sizeof(params->pei_data->dq_map[1]));
49 memcpy(memory_params->DqsMapCpu2DramCh0, params->pei_data->dqs_map[0],
50 sizeof(params->pei_data->dqs_map[0]));
51 memcpy(memory_params->DqsMapCpu2DramCh1, params->pei_data->dqs_map[1],
52 sizeof(params->pei_data->dqs_map[1]));
53 memcpy(memory_params->RcompResistor, params->pei_data->RcompResistor,
54 sizeof(params->pei_data->RcompResistor));
55 memcpy(memory_params->RcompTarget, params->pei_data->RcompTarget,
56 sizeof(params->pei_data->RcompTarget));
57 memory_params->MemorySpdDataLen = SPD_LEN;
58 memory_params->DqPinsInterleaved = FALSE;
59}