Gitiles
Code Review Sign In
review.coreboot.org / coreboot / a50ced2eba20a007fa5b486c251c252ad09868cf / . / src / mainboard / asrock / e350m1 / BiosCallOuts.c
blob: 2e86ff6f3ac69af3fe5f686fec81ae9f21c5f548 [file] [log] [blame]
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]14 */
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]15
Kyösti Mälkki526c2fb2014-07-10 22:16:58 +0300[diff] [blame]16#include "AGESA.h"
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]17#include "amdlib.h"
Kyösti Mälkki26f297e2014-05-26 11:27:54 +0300[diff] [blame]18#include <northbridge/amd/agesa/BiosCallOuts.h>
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]19#include "heapManager.h"
20#include "SB800.h"
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]21#include <stdlib.h>
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]22
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]23
Stefan Reinauerdd132a52015-07-30 11:16:37 -0700[diff] [blame]24static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]25
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]26const BIOS_CALLOUT_STRUCT BiosCallouts[] =
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]27{
Kyösti Mälkki5e19fa42014-05-04 23:13:54 +0300[diff] [blame]28 {AGESA_DO_RESET, agesa_Reset },
Kyösti Mälkkia1ebbc42014-10-17 22:33:22 +0300[diff] [blame]29 {AGESA_READ_SPD, agesa_ReadSpd },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]30 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
Kyösti Mälkki6b4b1512014-05-05 12:05:53 +0300[diff] [blame]31 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]32 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]33 {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]34 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]35 {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]36};
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]37const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]38
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]39/* Call the host environment interface to provide a user hook opportunity. */
Stefan Reinauerdd132a52015-07-30 11:16:37 -0700[diff] [blame]40static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]41{
42 AGESA_STATUS Status;
43 UINTN FcnData;
44 MEM_DATA_STRUCT *MemData;
45 UINT32 AcpiMmioAddr;
46 UINT32 GpioMmioAddr;
47 UINT8 Data8;
48 UINT16 Data16;
49 UINT8 TempData8;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]50
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]51 FcnData = Data;
52 MemData = ConfigPtr;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]53
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]54 Status = AGESA_SUCCESS;
55 /* Get SB800 MMIO Base (AcpiMmioAddr) */
56 WriteIo8 (0xCD6, 0x27);
57 Data8 = ReadIo8(0xCD7);
Elyes HAOUAS6350a2e2016-09-16 20:49:38 +0200[diff] [blame]58 Data16 = Data8 << 8;
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]59 WriteIo8 (0xCD6, 0x26);
60 Data8 = ReadIo8(0xCD7);
61 Data16 |= Data8;
62 AcpiMmioAddr = (UINT32)Data16 << 16;
63 GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]64
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]65 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
66 Data8 &= ~BIT5;
67 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
68 TempData8 &= 0x03;
69 TempData8 |= Data8;
70 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]71
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]72 Data8 |= BIT2+BIT3;
73 Data8 &= ~BIT4;
74 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
75 TempData8 &= 0x23;
76 TempData8 |= Data8;
77 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
78 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
79 Data8 &= ~BIT5;
80 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
81 TempData8 &= 0x03;
82 TempData8 |= Data8;
83 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
84 Data8 |= BIT2+BIT3;
85 Data8 &= ~BIT4;
86 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
87 TempData8 &= 0x23;
88 TempData8 |= Data8;
89 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]90
Felix Heldc1869662014-07-19 00:21:43 +0200[diff] [blame]91 /* this seems to be just copy-pasted from the AMD reference boards and needs
92 * some investigation
93 */
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]94 switch(MemData->ParameterListPtr->DDR3Voltage){
95 case VOLT1_35:
96 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
97 Data8 &= ~(UINT8)BIT6;
98 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
99 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
100 Data8 |= (UINT8)BIT6;
101 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
102 break;
103 case VOLT1_25:
104 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
105 Data8 &= ~(UINT8)BIT6;
106 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
107 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
108 Data8 &= ~(UINT8)BIT6;
109 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
110 break;
111 case VOLT1_5:
112 default:
113 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
114 Data8 |= (UINT8)BIT6;
115 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
116 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
117 Data8 &= ~(UINT8)BIT6;
118 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
119 }
Marshall Buschmaneab1db12011-06-10 21:16:41 -0500[diff] [blame]120 // disable memory clear for boot time reduction
121 MemData->ParameterListPtr->EnableMemClr = FALSE;
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]122 return Status;
123}