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review.coreboot.org / coreboot / dd132a5d2d58ba011d535ae86a18e166d0cf5818 / . / src / mainboard / asrock / e350m1 / BiosCallOuts.c
blob: 7ebf306cf960336519c7ccc15f7cac7748a03f3f [file] [log] [blame]
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Patrick Georgib890a122015-03-26 15:17:45 +0100[diff] [blame]17 * Foundation, Inc.
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]18 */
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]19
Kyösti Mälkki526c2fb2014-07-10 22:16:58 +0300[diff] [blame]20#include "AGESA.h"
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]21#include "amdlib.h"
Kyösti Mälkki26f297e2014-05-26 11:27:54 +0300[diff] [blame]22#include <northbridge/amd/agesa/BiosCallOuts.h>
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]23#include "heapManager.h"
24#include "SB800.h"
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]25#include <stdlib.h>
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]26
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]27
Stefan Reinauerdd132a52015-07-30 11:16:37 -0700[diff] [blame^]28static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]29
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]30const BIOS_CALLOUT_STRUCT BiosCallouts[] =
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]31{
Kyösti Mälkki5e19fa42014-05-04 23:13:54 +0300[diff] [blame]32 {AGESA_DO_RESET, agesa_Reset },
Kyösti Mälkkia1ebbc42014-10-17 22:33:22 +0300[diff] [blame]33 {AGESA_READ_SPD, agesa_ReadSpd },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]34 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
Kyösti Mälkki6b4b1512014-05-05 12:05:53 +0300[diff] [blame]35 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]36 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]37 {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]38 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]39 {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]40};
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]41const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]42
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]43/* Call the host environment interface to provide a user hook opportunity. */
Stefan Reinauerdd132a52015-07-30 11:16:37 -0700[diff] [blame^]44static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]45{
46 AGESA_STATUS Status;
47 UINTN FcnData;
48 MEM_DATA_STRUCT *MemData;
49 UINT32 AcpiMmioAddr;
50 UINT32 GpioMmioAddr;
51 UINT8 Data8;
52 UINT16 Data16;
53 UINT8 TempData8;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]54
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]55 FcnData = Data;
56 MemData = ConfigPtr;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]57
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]58 Status = AGESA_SUCCESS;
59 /* Get SB800 MMIO Base (AcpiMmioAddr) */
60 WriteIo8 (0xCD6, 0x27);
61 Data8 = ReadIo8(0xCD7);
62 Data16 = Data8<<8;
63 WriteIo8 (0xCD6, 0x26);
64 Data8 = ReadIo8(0xCD7);
65 Data16 |= Data8;
66 AcpiMmioAddr = (UINT32)Data16 << 16;
67 GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]68
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]69 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
70 Data8 &= ~BIT5;
71 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
72 TempData8 &= 0x03;
73 TempData8 |= Data8;
74 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]75
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]76 Data8 |= BIT2+BIT3;
77 Data8 &= ~BIT4;
78 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
79 TempData8 &= 0x23;
80 TempData8 |= Data8;
81 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
82 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
83 Data8 &= ~BIT5;
84 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
85 TempData8 &= 0x03;
86 TempData8 |= Data8;
87 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
88 Data8 |= BIT2+BIT3;
89 Data8 &= ~BIT4;
90 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
91 TempData8 &= 0x23;
92 TempData8 |= Data8;
93 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]94
Felix Heldc1869662014-07-19 00:21:43 +0200[diff] [blame]95 /* this seems to be just copy-pasted from the AMD reference boards and needs
96 * some investigation
97 */
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]98 switch(MemData->ParameterListPtr->DDR3Voltage){
99 case VOLT1_35:
100 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
101 Data8 &= ~(UINT8)BIT6;
102 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
103 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
104 Data8 |= (UINT8)BIT6;
105 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
106 break;
107 case VOLT1_25:
108 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
109 Data8 &= ~(UINT8)BIT6;
110 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
111 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
112 Data8 &= ~(UINT8)BIT6;
113 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
114 break;
115 case VOLT1_5:
116 default:
117 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
118 Data8 |= (UINT8)BIT6;
119 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
120 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
121 Data8 &= ~(UINT8)BIT6;
122 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
123 }
Marshall Buschmaneab1db12011-06-10 21:16:41 -0500[diff] [blame]124 // disable memory clear for boot time reduction
125 MemData->ParameterListPtr->EnableMemClr = FALSE;
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]126 return Status;
127}