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review.coreboot.org / coreboot / 526c2fb278c6c4eccebaaaea9e1f7a00358d10e9 / . / src / mainboard / asrock / e350m1 / BiosCallOuts.c
blob: 09571dd8c3b54e1e2ab18f1b6db62add7b2a35d2 [file] [log] [blame]
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +0100[diff] [blame]17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]18 */
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]19
Kyösti Mälkki526c2fb2014-07-10 22:16:58 +0300[diff] [blame^]20#include "AGESA.h"
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]21#include "amdlib.h"
22#include "BiosCallOuts.h"
23#include "heapManager.h"
24#include "SB800.h"
Jens Rottmanndb6c5bf2013-03-21 22:21:28 +0100[diff] [blame]25#include <northbridge/amd/agesa/family14/dimmSpd.h>
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]26#include <stdlib.h>
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]27
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]28/* Should AGESA_GNB_PCIE_SLOT_RESET use agesa_NoopSuccess?
29 *
30 * Board is known to have some issues with integrated NIC and
31 * might need implementation to drive some GPIOs.
32 */
33
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]34static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr);
35
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]36const BIOS_CALLOUT_STRUCT BiosCallouts[] =
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]37{
Kyösti Mälkkief9343c2014-05-04 11:42:55 +0300[diff] [blame]38 {AGESA_ALLOCATE_BUFFER, agesa_AllocateBuffer },
39 {AGESA_DEALLOCATE_BUFFER, agesa_DeallocateBuffer },
40 {AGESA_LOCATE_BUFFER, agesa_LocateBuffer },
Kyösti Mälkki5e19fa42014-05-04 23:13:54 +0300[diff] [blame]41 {AGESA_DO_RESET, agesa_Reset },
Kyösti Mälkki08df7322014-05-04 14:53:36 +0300[diff] [blame]42 {AGESA_READ_SPD, BiosReadSpd },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]43 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
Kyösti Mälkki6b4b1512014-05-05 12:05:53 +0300[diff] [blame]44 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]45 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]46 {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
Kyösti Mälkkic459f962014-05-04 17:07:45 +0300[diff] [blame]47 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
Kyösti Mälkkif1bb19a2014-05-04 17:23:49 +0300[diff] [blame]48 {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopUnsupported },
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]49};
Kyösti Mälkki6025efa2014-05-05 13:20:56 +0300[diff] [blame]50const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]51
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]52/* Call the host environment interface to provide a user hook opportunity. */
Kyösti Mälkkic0096012014-05-05 18:56:33 +0300[diff] [blame]53static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]54{
55 AGESA_STATUS Status;
56 UINTN FcnData;
57 MEM_DATA_STRUCT *MemData;
58 UINT32 AcpiMmioAddr;
59 UINT32 GpioMmioAddr;
60 UINT8 Data8;
61 UINT16 Data16;
62 UINT8 TempData8;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]63
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]64 FcnData = Data;
65 MemData = ConfigPtr;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]66
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]67 Status = AGESA_SUCCESS;
68 /* Get SB800 MMIO Base (AcpiMmioAddr) */
69 WriteIo8 (0xCD6, 0x27);
70 Data8 = ReadIo8(0xCD7);
71 Data16 = Data8<<8;
72 WriteIo8 (0xCD6, 0x26);
73 Data8 = ReadIo8(0xCD7);
74 Data16 |= Data8;
75 AcpiMmioAddr = (UINT32)Data16 << 16;
76 GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]77
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]78 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
79 Data8 &= ~BIT5;
80 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
81 TempData8 &= 0x03;
82 TempData8 |= Data8;
83 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]84
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]85 Data8 |= BIT2+BIT3;
86 Data8 &= ~BIT4;
87 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
88 TempData8 &= 0x23;
89 TempData8 |= Data8;
90 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
91 Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
92 Data8 &= ~BIT5;
93 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
94 TempData8 &= 0x03;
95 TempData8 |= Data8;
96 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
97 Data8 |= BIT2+BIT3;
98 Data8 &= ~BIT4;
99 TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
100 TempData8 &= 0x23;
101 TempData8 |= Data8;
102 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
Stefan Reinauer5ff7c132011-10-31 12:56:45 -0700[diff] [blame]103
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]104 switch(MemData->ParameterListPtr->DDR3Voltage){
105 case VOLT1_35:
106 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
107 Data8 &= ~(UINT8)BIT6;
108 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
109 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
110 Data8 |= (UINT8)BIT6;
111 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
112 break;
113 case VOLT1_25:
114 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
115 Data8 &= ~(UINT8)BIT6;
116 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
117 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
118 Data8 &= ~(UINT8)BIT6;
119 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
120 break;
121 case VOLT1_5:
122 default:
123 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
124 Data8 |= (UINT8)BIT6;
125 Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
126 Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
127 Data8 &= ~(UINT8)BIT6;
128 Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
129 }
Marshall Buschmaneab1db12011-06-10 21:16:41 -0500[diff] [blame]130 // disable memory clear for boot time reduction
131 MemData->ParameterListPtr->EnableMemClr = FALSE;
Scott Duplichana649a962011-02-24 05:00:33 +0000[diff] [blame]132 return Status;
133}