Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 17 | #include <stdint.h> |
| 18 | #include <string.h> |
| 19 | #include <device/pci_def.h> |
| 20 | #include <arch/io.h> |
| 21 | #include <device/pnp_def.h> |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 22 | #include <cpu/x86/lapic.h> |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 23 | #include <pc80/mc146818rtc.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 24 | #include <console/console.h> |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 25 | #include <cpu/amd/model_fxx_rev.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 26 | #include <northbridge/amd/amdk8/raminit.h> |
Edward O'Callaghan | ebe3a7a | 2015-01-05 00:27:54 +1100 | [diff] [blame] | 27 | #include <delay.h> |
Patrick Georgi | 9bd9a90 | 2010-11-20 10:31:00 +0000 | [diff] [blame] | 28 | #include <spd.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 29 | #include <cpu/x86/lapic.h> |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 30 | #include "northbridge/amd/amdk8/reset_test.c" |
Edward O'Callaghan | ffe460d | 2014-04-27 22:51:40 +1000 | [diff] [blame] | 31 | #include <superio/winbond/common/winbond.h> |
| 32 | #include <superio/winbond/w83627dhg/w83627dhg.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 33 | #include <cpu/x86/bist.h> |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 34 | #include "northbridge/amd/amdk8/setup_resource_map.c" |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 35 | #include <southbridge/amd/sb700/sb700.h> |
| 36 | #include <southbridge/amd/sb700/smbus.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 37 | #include "northbridge/amd/amdk8/debug.c" /* After sb700/early_setup.c! */ |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 38 | |
| 39 | #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1) |
Uwe Hermann | 3a4ed15 | 2010-12-05 22:36:14 +0000 | [diff] [blame] | 40 | #define GPIO2345_DEV PNP_DEV(0x2e, W83627DHG_GPIO2345_V) |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 41 | |
Damien Zammit | 75a3d1f | 2016-11-28 00:29:10 +1100 | [diff] [blame] | 42 | unsigned get_sbdn(unsigned bus); |
| 43 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 44 | static void memreset(int controllers, const struct mem_controller *ctrl) { } |
| 45 | static void activate_spd_rom(const struct mem_controller *ctrl) { } |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 46 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 47 | static inline int spd_read_byte(u32 device, u32 address) |
| 48 | { |
efdesign98 | 00c8c4a | 2011-07-20 12:37:58 -0600 | [diff] [blame] | 49 | return do_smbus_read_byte(SMBUS_IO_BASE, device, address); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 50 | } |
| 51 | |
Damien Zammit | 75a3d1f | 2016-11-28 00:29:10 +1100 | [diff] [blame] | 52 | #include "southbridge/amd/rs780/early_setup.c" |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 53 | #include <northbridge/amd/amdk8/amdk8.h> |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 54 | #include "northbridge/amd/amdk8/incoherent_ht.c" |
| 55 | #include "northbridge/amd/amdk8/raminit.c" |
| 56 | #include "northbridge/amd/amdk8/coherent_ht.c" |
| 57 | #include "lib/generic_sdram.c" |
| 58 | #include "resourcemap.c" |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 59 | #include "cpu/amd/dualcore/dualcore.c" |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 60 | #include "cpu/amd/model_fxx/init_cpus.c" |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 61 | #include "cpu/amd/model_fxx/fidvid.c" |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 62 | #include "northbridge/amd/amdk8/early_ht.c" |
| 63 | |
Stefan Reinauer | 56a684a | 2010-04-07 15:40:26 +0000 | [diff] [blame] | 64 | static void sio_init(void) |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 65 | { |
| 66 | u8 reg; |
| 67 | |
| 68 | pnp_enter_ext_func_mode(GPIO2345_DEV); |
| 69 | pnp_set_logical_device(GPIO2345_DEV); |
| 70 | |
Rudolf Marek | aa55f37 | 2011-01-16 16:23:51 +0000 | [diff] [blame] | 71 | /* Pin 119 ~ 120 is GP21, GP20 */ |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 72 | reg = pnp_read_config(GPIO2345_DEV, 0x29); |
| 73 | pnp_write_config(GPIO2345_DEV, 0x29, (reg | 2)); |
| 74 | |
Rudolf Marek | 9c9ae3a | 2010-11-30 21:21:33 +0000 | [diff] [blame] | 75 | /* Turn on the Power LED ("Suspend LED" in Super I/O) */ |
| 76 | reg = pnp_read_config(GPIO2345_DEV, 0xf3); |
| 77 | pnp_write_config(GPIO2345_DEV, 0xf3, (reg | 0x40)); |
| 78 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 79 | /* todo document this */ |
| 80 | pnp_write_config(GPIO2345_DEV, 0x2c, 0x1); |
| 81 | pnp_write_config(GPIO2345_DEV, 0x2d, 0x1); |
| 82 | |
Rudolf Marek | aa55f37 | 2011-01-16 16:23:51 +0000 | [diff] [blame] | 83 | /* GPO20 - sideport voltage 1 = 1.82 0 = 1.92 |
| 84 | GPI21 - unknown input (NC?) |
| 85 | GPI22 - unknown input (NC?) |
| 86 | GPO23 - mgpuV bit0 |
Rudolf Marek | a112523 | 2011-01-16 17:15:36 +0000 | [diff] [blame] | 87 | GP24-27 - PS/2 mouse/keyb (only keyb is connected use flip interface for mouse) |
Rudolf Marek | aa55f37 | 2011-01-16 16:23:51 +0000 | [diff] [blame] | 88 | */ |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 89 | pnp_write_config(GPIO2345_DEV, 0x30, 0x07); /* Enable GPIO 2,3,4. */ |
| 90 | pnp_write_config(GPIO2345_DEV, 0xe3, 0xf6); /* dir of GPIO2 11110110*/ |
| 91 | pnp_write_config(GPIO2345_DEV, 0xe4, 0x0e); /* data */ |
| 92 | pnp_write_config(GPIO2345_DEV, 0xe5, 0x00); /* No inversion */ |
| 93 | |
efdesign98 | 00c8c4a | 2011-07-20 12:37:58 -0600 | [diff] [blame] | 94 | /* GPIO30 - unknown output, set to 0 |
Rudolf Marek | aa55f37 | 2011-01-16 16:23:51 +0000 | [diff] [blame] | 95 | GPI31 - unknown input NC? |
| 96 | GPI32 - unknown input NC? |
| 97 | GPIO33 - unknown output, set to 0. |
| 98 | GPI34 - unknown input NC? |
| 99 | GPO35 - loadline control 1 = enabled (2 phase clock) 0 = disabled 4 phase clock |
| 100 | GPIO36 - input = HT voltage 1.30V output (low) = HT voltage 1.35V |
| 101 | GP37 - unknown input NC? */ |
| 102 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 103 | pnp_write_config(GPIO2345_DEV, 0xf0, 0xd6); /* dir of GPIO3 11010110*/ |
| 104 | pnp_write_config(GPIO2345_DEV, 0xf1, 0x96); /* data */ |
| 105 | pnp_write_config(GPIO2345_DEV, 0xf2, 0x00); /* No inversion */ |
| 106 | |
Rudolf Marek | aa55f37 | 2011-01-16 16:23:51 +0000 | [diff] [blame] | 107 | /* GPO40 - mgpuV bit2 |
| 108 | GPO41 - mgpuV bit1 |
| 109 | GPO42 - IRTX |
| 110 | GPO43 - IRRX |
| 111 | GPIO44 - memory voltage bit2 (input/outputlow) |
| 112 | GPIO45 - memory voltage bit1 (2.60 (000) - 2.95 (111)) |
| 113 | GPIO46 - memory voltage bit0 |
| 114 | GPIO47 - unknown input? */ |
| 115 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 116 | pnp_write_config(GPIO2345_DEV, 0xf4, 0xd0); /* dir of GPIO4 11010000 */ |
| 117 | pnp_write_config(GPIO2345_DEV, 0xf5, 0x83); /* data */ |
| 118 | pnp_write_config(GPIO2345_DEV, 0xf6, 0x00); /* No inversion */ |
| 119 | |
| 120 | pnp_write_config(GPIO2345_DEV, 0xf7, 0x00); /* MFC */ |
| 121 | pnp_write_config(GPIO2345_DEV, 0xf8, 0x00); /* MFC */ |
| 122 | pnp_write_config(GPIO2345_DEV, 0xfe, 0x07); /* trig type */ |
| 123 | pnp_exit_ext_func_mode(GPIO2345_DEV); |
| 124 | } |
| 125 | |
| 126 | void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) |
| 127 | { |
Rudolf Marek | f41752c | 2010-11-30 20:18:53 +0000 | [diff] [blame] | 128 | static const u16 spd_addr[] = { DIMM0, DIMM2, 0, 0, DIMM1, DIMM3, 0, 0, }; |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 129 | int needs_reset = 0; |
| 130 | u32 bsp_apicid = 0; |
| 131 | msr_t msr; |
| 132 | struct cpuid_result cpuid1; |
Patrick Georgi | bbc880e | 2012-11-20 18:20:56 +0100 | [diff] [blame] | 133 | struct sys_info *sysinfo = &sysinfo_car; |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 134 | |
| 135 | if (!cpu_init_detectedx && boot_cpu()) { |
| 136 | /* Nothing special needs to be done to find bus 0 */ |
| 137 | /* Allow the HT devices to be found */ |
| 138 | enumerate_ht_chain(); |
Zheng Bao | c342223 | 2011-03-28 03:33:10 +0000 | [diff] [blame] | 139 | /* sb7xx_51xx_lpc_port80(); */ |
| 140 | sb7xx_51xx_pci_port80(); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 141 | } |
| 142 | |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 143 | if (bist == 0) |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 144 | bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 145 | |
| 146 | enable_rs780_dev8(); |
Zheng Bao | c342223 | 2011-03-28 03:33:10 +0000 | [diff] [blame] | 147 | sb7xx_51xx_lpc_init(); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 148 | |
| 149 | sio_init(); |
Edward O'Callaghan | ffe460d | 2014-04-27 22:51:40 +1000 | [diff] [blame] | 150 | winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Uwe Hermann | b015d02 | 2010-09-24 18:18:20 +0000 | [diff] [blame] | 151 | |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 152 | console_init(); |
| 153 | |
| 154 | /* Halt if there was a built in self test failure */ |
| 155 | report_bist_failure(bist); |
| 156 | printk(BIOS_DEBUG, "bsp_apicid=0x%x\n", bsp_apicid); |
| 157 | |
| 158 | setup_939a785gmh_resource_map(); |
| 159 | |
| 160 | setup_coherent_ht_domain(); |
| 161 | |
Patrick Georgi | e166782 | 2012-05-05 15:29:32 +0200 | [diff] [blame] | 162 | #if CONFIG_LOGICAL_CPUS |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 163 | /* It is said that we should start core1 after all core0 launched */ |
| 164 | wait_all_core0_started(); |
| 165 | start_other_cores(); |
| 166 | #endif |
| 167 | wait_all_aps_started(bsp_apicid); |
| 168 | |
| 169 | ht_setup_chains_x(sysinfo); |
| 170 | |
| 171 | /* run _early_setup before soft-reset. */ |
| 172 | rs780_early_setup(); |
Zheng Bao | c342223 | 2011-03-28 03:33:10 +0000 | [diff] [blame] | 173 | sb7xx_51xx_early_setup(); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 174 | |
| 175 | /* Check to see if processor is capable of changing FIDVID */ |
| 176 | /* otherwise it will throw a GP# when reading FIDVID_STATUS */ |
| 177 | cpuid1 = cpuid(0x80000007); |
Uwe Hermann | 7b99705 | 2010-11-21 22:47:22 +0000 | [diff] [blame] | 178 | if ((cpuid1.edx & 0x6) == 0x6) { |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 179 | /* Read FIDVID_STATUS */ |
Elyes HAOUAS | 6350a2e | 2016-09-16 20:49:38 +0200 | [diff] [blame] | 180 | msr = rdmsr(0xc0010042); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 181 | printk(BIOS_DEBUG, "begin msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
| 182 | |
| 183 | enable_fid_change(); |
| 184 | enable_fid_change_on_sb(sysinfo->sbbusn, sysinfo->sbdn); |
| 185 | init_fidvid_bsp(bsp_apicid); |
| 186 | |
| 187 | /* show final fid and vid */ |
Elyes HAOUAS | 6350a2e | 2016-09-16 20:49:38 +0200 | [diff] [blame] | 188 | msr = rdmsr(0xc0010042); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 189 | printk(BIOS_DEBUG, "end msr fid, vid: hi=0x%x, lo=0x%x\n", msr.hi, msr.lo); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 190 | } else { |
| 191 | printk(BIOS_DEBUG, "Changing FIDVID not supported\n"); |
| 192 | } |
| 193 | |
| 194 | needs_reset = optimize_link_coherent_ht(); |
| 195 | needs_reset |= optimize_link_incoherent_ht(sysinfo); |
| 196 | rs780_htinit(); |
| 197 | printk(BIOS_DEBUG, "needs_reset=0x%x\n", needs_reset); |
| 198 | |
| 199 | if (needs_reset) { |
Stefan Reinauer | 069f476 | 2015-01-05 13:02:32 -0800 | [diff] [blame] | 200 | printk(BIOS_INFO, "ht reset -\n"); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 201 | soft_reset(); |
| 202 | } |
| 203 | |
| 204 | allow_all_aps_stop(bsp_apicid); |
| 205 | |
| 206 | /* It's the time to set ctrl now; */ |
| 207 | printk(BIOS_DEBUG, "sysinfo->nodes: %2x sysinfo->ctrl: %p spd_addr: %p\n", |
| 208 | sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 209 | fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr); |
| 210 | sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); |
| 211 | |
| 212 | rs780_before_pci_init(); |
Zheng Bao | c342223 | 2011-03-28 03:33:10 +0000 | [diff] [blame] | 213 | sb7xx_51xx_before_pci_init(); |
Rudolf Marek | 133647a | 2010-04-05 19:47:34 +0000 | [diff] [blame] | 214 | |
| 215 | post_cache_as_ram(); |
| 216 | } |