Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 14 | */ |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 15 | |
Kyösti Mälkki | 526c2fb | 2014-07-10 22:16:58 +0300 | [diff] [blame] | 16 | #include "AGESA.h" |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 17 | #include "amdlib.h" |
Kyösti Mälkki | 26f297e | 2014-05-26 11:27:54 +0300 | [diff] [blame] | 18 | #include <northbridge/amd/agesa/BiosCallOuts.h> |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 19 | #include "heapManager.h" |
| 20 | #include "SB800.h" |
Kyösti Mälkki | 50c9637 | 2014-10-18 07:51:03 +0300 | [diff] [blame] | 21 | #include <southbridge/amd/cimx/sb800/gpio_oem.h> |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 22 | #include <stdlib.h> |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 23 | |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 24 | static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); |
| 25 | static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); |
Kyösti Mälkki | c009601 | 2014-05-05 18:56:33 +0300 | [diff] [blame] | 26 | |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 27 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 28 | { |
Kyösti Mälkki | 5e19fa4 | 2014-05-04 23:13:54 +0300 | [diff] [blame] | 29 | {AGESA_DO_RESET, agesa_Reset }, |
Kyösti Mälkki | a1ebbc4 | 2014-10-17 22:33:22 +0300 | [diff] [blame] | 30 | {AGESA_READ_SPD, agesa_ReadSpd }, |
Kyösti Mälkki | c459f96 | 2014-05-04 17:07:45 +0300 | [diff] [blame] | 31 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
Kyösti Mälkki | 6b4b151 | 2014-05-05 12:05:53 +0300 | [diff] [blame] | 32 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
Kyösti Mälkki | c009601 | 2014-05-05 18:56:33 +0300 | [diff] [blame] | 33 | {AGESA_GNB_PCIE_SLOT_RESET, board_GnbPcieSlotReset }, |
| 34 | {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit }, |
Kyösti Mälkki | c459f96 | 2014-05-04 17:07:45 +0300 | [diff] [blame] | 35 | {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess }, |
| 36 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 37 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 38 | }; |
Kyösti Mälkki | 6025efa | 2014-05-05 13:20:56 +0300 | [diff] [blame] | 39 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 40 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 41 | /* Call the host environment interface to provide a user hook opportunity. */ |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 42 | static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr) |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 43 | { |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 44 | AGESA_STATUS Status; |
| 45 | UINTN FcnData; |
| 46 | MEM_DATA_STRUCT *MemData; |
| 47 | UINT32 AcpiMmioAddr; |
| 48 | UINT32 GpioMmioAddr; |
| 49 | UINT8 Data8; |
| 50 | UINT16 Data16; |
| 51 | UINT8 TempData8; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 52 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 53 | FcnData = Data; |
| 54 | MemData = ConfigPtr; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 55 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 56 | Status = AGESA_SUCCESS; |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 57 | /* Get SB MMIO Base (AcpiMmioAddr) */ |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 58 | WriteIo8 (0xCD6, 0x27); |
| 59 | Data8 = ReadIo8(0xCD7); |
Elyes HAOUAS | 6350a2e | 2016-09-16 20:49:38 +0200 | [diff] [blame] | 60 | Data16 = Data8 << 8; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 61 | WriteIo8 (0xCD6, 0x26); |
| 62 | Data8 = ReadIo8(0xCD7); |
| 63 | Data16 |= Data8; |
| 64 | AcpiMmioAddr = (UINT32)Data16 << 16; |
| 65 | GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 66 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 67 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178); |
| 68 | Data8 &= ~BIT5; |
| 69 | TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); |
| 70 | TempData8 &= 0x03; |
| 71 | TempData8 |= Data8; |
| 72 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8); |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 73 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 74 | Data8 |= BIT2+BIT3; |
| 75 | Data8 &= ~BIT4; |
| 76 | TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); |
| 77 | TempData8 &= 0x23; |
| 78 | TempData8 |= Data8; |
| 79 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 80 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 81 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179); |
| 82 | Data8 &= ~BIT5; |
| 83 | TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); |
| 84 | TempData8 &= 0x03; |
| 85 | TempData8 |= Data8; |
| 86 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8); |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 87 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 88 | Data8 |= BIT2+BIT3; |
| 89 | Data8 &= ~BIT4; |
| 90 | TempData8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); |
| 91 | TempData8 &= 0x23; |
| 92 | TempData8 |= Data8; |
| 93 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8); |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 94 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 95 | switch(MemData->ParameterListPtr->DDR3Voltage){ |
| 96 | case VOLT1_35: |
| 97 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); |
| 98 | Data8 &= ~(UINT8)BIT6; |
| 99 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); |
| 100 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); |
| 101 | Data8 |= (UINT8)BIT6; |
| 102 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8); |
| 103 | break; |
| 104 | case VOLT1_25: |
| 105 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); |
| 106 | Data8 &= ~(UINT8)BIT6; |
| 107 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); |
| 108 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); |
| 109 | Data8 &= ~(UINT8)BIT6; |
| 110 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8); |
| 111 | break; |
| 112 | case VOLT1_5: |
| 113 | default: |
| 114 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); |
| 115 | Data8 |= (UINT8)BIT6; |
| 116 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8); |
| 117 | Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179); |
| 118 | Data8 &= ~(UINT8)BIT6; |
| 119 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8); |
| 120 | } |
| 121 | return Status; |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 122 | } |
Kerry Sheh | 01f7ab9 | 2012-01-19 13:18:36 +0800 | [diff] [blame] | 123 | |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 124 | /* PCIE slot reset control */ |
Stefan Reinauer | dd132a5 | 2015-07-30 11:16:37 -0700 | [diff] [blame] | 125 | static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr) |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 126 | { |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 127 | AGESA_STATUS Status; |
| 128 | UINTN FcnData; |
| 129 | PCIe_SLOT_RESET_INFO *ResetInfo; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 130 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 131 | UINT32 GpioMmioAddr; |
| 132 | UINT32 AcpiMmioAddr; |
| 133 | UINT8 Data8; |
| 134 | UINT16 Data16; |
Stefan Reinauer | 5ff7c13 | 2011-10-31 12:56:45 -0700 | [diff] [blame] | 135 | |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 136 | FcnData = Data; |
| 137 | ResetInfo = ConfigPtr; |
| 138 | // Get SB800 MMIO Base (AcpiMmioAddr) |
| 139 | WriteIo8(0xCD6, 0x27); |
| 140 | Data8 = ReadIo8(0xCD7); |
Elyes HAOUAS | 6350a2e | 2016-09-16 20:49:38 +0200 | [diff] [blame] | 141 | Data16 = Data8 << 8; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 142 | WriteIo8(0xCD6, 0x26); |
| 143 | Data8 = ReadIo8(0xCD7); |
Elyes HAOUAS | 6350a2e | 2016-09-16 20:49:38 +0200 | [diff] [blame] | 144 | Data16 |= Data8; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 145 | AcpiMmioAddr = (UINT32)Data16 << 16; |
| 146 | Status = AGESA_UNSUPPORTED; |
| 147 | GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; |
| 148 | switch (ResetInfo->ResetId) |
| 149 | { |
| 150 | case 4: |
| 151 | switch (ResetInfo->ResetControl) { |
| 152 | case AssertSlotReset: |
| 153 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 154 | Data8 &= ~(UINT8)BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 155 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 |
| 156 | Status = AGESA_SUCCESS; |
| 157 | break; |
| 158 | case DeassertSlotReset: |
| 159 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 160 | Data8 |= BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 161 | Write64Mem8 (GpioMmioAddr+SB_GPIO_REG21, Data8); // MXM_GPIO0. GPIO21 |
| 162 | Status = AGESA_SUCCESS; |
| 163 | break; |
| 164 | } |
| 165 | break; |
| 166 | case 6: |
| 167 | switch (ResetInfo->ResetControl) { |
| 168 | case AssertSlotReset: |
| 169 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 170 | Data8 &= ~(UINT8)BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 171 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 |
| 172 | Status = AGESA_SUCCESS; |
| 173 | break; |
| 174 | case DeassertSlotReset: |
| 175 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 176 | Data8 |= BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 177 | Write64Mem8 (GpioMmioAddr+SB_GPIO_REG25, Data8); // PCIE_RST#_LAN, GPIO25 |
| 178 | Status = AGESA_SUCCESS; |
| 179 | break; |
| 180 | } |
| 181 | break; |
| 182 | case 7: |
| 183 | switch (ResetInfo->ResetControl) { |
| 184 | case AssertSlotReset: |
| 185 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 186 | Data8 &= ~(UINT8)BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 187 | Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 |
| 188 | Status = AGESA_SUCCESS; |
| 189 | break; |
| 190 | case DeassertSlotReset: |
Jens Rottmann | f87855c | 2013-02-18 18:56:48 +0100 | [diff] [blame] | 191 | Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02); |
Elyes HAOUAS | f2fcf22 | 2016-10-02 10:09:11 +0200 | [diff] [blame] | 192 | Data8 |= BIT6; |
Kerry Sheh | f03360f | 2012-01-19 13:25:55 +0800 | [diff] [blame] | 193 | Write64Mem8 (GpioMmioAddr+SB_GPIO_REG02, Data8); // MPCIE_RST0, GPIO02 |
| 194 | Status = AGESA_SUCCESS; |
| 195 | break; |
| 196 | } |
| 197 | break; |
| 198 | } |
| 199 | return Status; |
Frank Vibrans | 69da1b6 | 2011-02-14 19:04:45 +0000 | [diff] [blame] | 200 | } |