Angel Pons | f94ac9a | 2020-04-05 15:46:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 2 | |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Kyösti Mälkki | 0c1dd9c | 2020-06-17 23:37:49 +0300 | [diff] [blame] | 4 | #include <acpi/acpi_gnvs.h> |
Furquan Shaikh | 76cedd2 | 2020-05-02 10:24:23 -0700 | [diff] [blame] | 5 | #include <acpi/acpigen.h> |
Angel Pons | a472e33 | 2020-10-26 00:08:47 +0100 | [diff] [blame] | 6 | #include <arch/ioapic.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 7 | #include <arch/smp/mpspec.h> |
| 8 | #include <cbmem.h> |
Angel Pons | 9d733de | 2020-11-23 13:15:19 +0100 | [diff] [blame^] | 9 | #include <cpu/intel/haswell/haswell.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 10 | #include <device/pci_ops.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 11 | #include <cpu/x86/smm.h> |
| 12 | #include <console/console.h> |
| 13 | #include <types.h> |
| 14 | #include <string.h> |
| 15 | #include <arch/cpu.h> |
| 16 | #include <cpu/x86/msr.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 17 | #include <cpu/intel/turbo.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 18 | #include <soc/acpi.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 19 | #include <soc/iomap.h> |
| 20 | #include <soc/lpc.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 21 | #include <soc/pci_devs.h> |
| 22 | #include <soc/pm.h> |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 23 | #include <soc/systemagent.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 24 | #include <soc/intel/broadwell/chip.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 25 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 26 | unsigned long acpi_fill_mcfg(unsigned long current) |
| 27 | { |
| 28 | current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current, |
| 29 | MCFG_BASE_ADDRESS, 0, 0, 255); |
| 30 | return current; |
| 31 | } |
| 32 | |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 33 | static unsigned long acpi_fill_dmar(unsigned long current) |
| 34 | { |
Kyösti Mälkki | 903b40a | 2019-07-03 07:25:59 +0300 | [diff] [blame] | 35 | struct device *const igfx_dev = pcidev_path_on_root(SA_DEVFN_IGD); |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 36 | const u32 gfxvtbar = MCHBAR32(GFXVTBAR) & ~0xfff; |
| 37 | const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff; |
| 38 | const bool gfxvten = MCHBAR32(GFXVTBAR) & 0x1; |
| 39 | const bool vtvc0en = MCHBAR32(VTVC0BAR) & 0x1; |
| 40 | |
| 41 | /* iGFX has to be enabled; GFXVTBAR set, enabled, in 32-bit space */ |
Angel Pons | 37799b3 | 2020-08-03 12:17:22 +0200 | [diff] [blame] | 42 | const bool emit_igd = |
| 43 | igfx_dev && igfx_dev->enabled && |
| 44 | gfxvtbar && gfxvten && |
| 45 | !MCHBAR32(GFXVTBAR + 4); |
| 46 | |
| 47 | /* First, add DRHD entries */ |
| 48 | if (emit_igd) { |
| 49 | const unsigned long tmp = current; |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 50 | |
| 51 | current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); |
Matt DeVillier | 7866d49 | 2018-03-29 14:59:57 +0200 | [diff] [blame] | 52 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 53 | |
| 54 | acpi_dmar_drhd_fixup(tmp, current); |
| 55 | } |
| 56 | |
| 57 | /* VTVC0BAR has to be set, enabled, and in 32-bit space */ |
| 58 | if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) { |
| 59 | const unsigned long tmp = current; |
| 60 | current += acpi_create_dmar_drhd(current, |
| 61 | DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); |
Matt DeVillier | 7866d49 | 2018-03-29 14:59:57 +0200 | [diff] [blame] | 62 | current += acpi_create_dmar_ds_ioapic(current, |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 63 | 2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0); |
| 64 | size_t i; |
| 65 | for (i = 0; i < 8; ++i) |
Matt DeVillier | 7866d49 | 2018-03-29 14:59:57 +0200 | [diff] [blame] | 66 | current += acpi_create_dmar_ds_msi_hpet(current, |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 67 | 0, PCH_HPET_PCI_BUS, |
| 68 | PCH_HPET_PCI_SLOT, i); |
| 69 | acpi_dmar_drhd_fixup(tmp, current); |
| 70 | } |
| 71 | |
Angel Pons | 37799b3 | 2020-08-03 12:17:22 +0200 | [diff] [blame] | 72 | /* Then, add RMRR entries after all DRHD entries */ |
| 73 | if (emit_igd) { |
| 74 | const unsigned long tmp = current; |
| 75 | |
| 76 | current += acpi_create_dmar_rmrr(current, 0, |
| 77 | sa_get_gsm_base(), sa_get_tolud_base() - 1); |
| 78 | current += acpi_create_dmar_ds_pci(current, 0, 2, 0); |
| 79 | acpi_dmar_rmrr_fixup(tmp, current); |
| 80 | } |
| 81 | |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 82 | return current; |
| 83 | } |
| 84 | |
Furquan Shaikh | 0f007d8 | 2020-04-24 06:41:18 -0700 | [diff] [blame] | 85 | unsigned long northbridge_write_acpi_tables(const struct device *const dev, |
Matt DeVillier | 0f49bbc | 2018-02-19 17:35:55 -0600 | [diff] [blame] | 86 | unsigned long current, |
| 87 | struct acpi_rsdp *const rsdp) |
| 88 | { |
| 89 | /* Create DMAR table only if we have VT-d capability. */ |
| 90 | const u32 capid0_a = pci_read_config32(dev, CAPID0_A); |
| 91 | if (capid0_a & VTD_DISABLE) |
| 92 | return current; |
| 93 | |
| 94 | acpi_dmar_t *const dmar = (acpi_dmar_t *)current; |
| 95 | printk(BIOS_DEBUG, "ACPI: * DMAR\n"); |
| 96 | acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar); |
| 97 | current += dmar->header.length; |
| 98 | current = acpi_align_current(current); |
| 99 | acpi_add_table(rsdp, dmar); |
| 100 | |
| 101 | return current; |
| 102 | } |