blob: 14776126c822b0faa704af402f767f1998c7f435 [file] [log] [blame]
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +03001/*
2 * This file is part of the coreboot project.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <arch/cpu.h>
15#include <console/console.h>
Kyösti Mälkkie325b222016-06-17 11:04:37 +030016#include <cpu/intel/romstage.h>
Kyösti Mälkki823020d2016-07-22 22:53:19 +030017#include <cpu/x86/mtrr.h>
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030018#include <program_loading.h>
19
Kyösti Mälkkidfb2de82016-11-19 16:39:21 +020020#define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000
Kyösti Mälkkie325b222016-06-17 11:04:37 +030021
Lee Leahy9d62e7e2017-03-15 17:40:50 -070022asmlinkage void *romstage_main(unsigned long bist)
Kyösti Mälkkie325b222016-06-17 11:04:37 +030023{
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030024 int i;
25 void *romstage_stack_after_car;
26 const int num_guards = 4;
27 const u32 stack_guard = 0xdeadbeef;
28 u32 *stack_base = (void *)(CONFIG_DCACHE_RAM_BASE +
Lee Leahy7b5f12b92017-03-15 17:16:59 -070029 CONFIG_DCACHE_RAM_SIZE -
30 DCACHE_RAM_ROMSTAGE_STACK_SIZE);
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030031
32 for (i = 0; i < num_guards; i++)
33 stack_base[i] = stack_guard;
34
Kyösti Mälkkie325b222016-06-17 11:04:37 +030035 mainboard_romstage_entry(bist);
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030036
37 /* Check the stack. */
38 for (i = 0; i < num_guards; i++) {
39 if (stack_base[i] == stack_guard)
40 continue;
41 printk(BIOS_DEBUG, "Smashed stack detected in romstage!\n");
42 }
43
44 /* Get the stack to use after cache-as-ram is torn down. */
Kyösti Mälkki823020d2016-07-22 22:53:19 +030045 romstage_stack_after_car = setup_stack_and_mtrrs();
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030046
47 return romstage_stack_after_car;
48}
49
Lee Leahy9d62e7e2017-03-15 17:40:50 -070050asmlinkage void romstage_after_car(void)
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030051{
52 /* Load the ramstage. */
53 run_ramstage();
Kyösti Mälkkie325b222016-06-17 11:04:37 +030054}
Kyösti Mälkki823020d2016-07-22 22:53:19 +030055
56#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT)
57/* setup_stack_and_mtrrs() determines the stack to use after
58 * cache-as-ram is torn down as well as the MTRR settings to use. */
59void *setup_stack_and_mtrrs(void)
60{
61 struct postcar_frame pcf;
62
63 postcar_frame_init_lowmem(&pcf);
64
65 /* Cache the ROM as WP just below 4GiB. */
66 postcar_frame_add_mtrr(&pcf, -CACHE_ROM_SIZE, CACHE_ROM_SIZE,
67 MTRR_TYPE_WRPROT);
68
69 /* Cache RAM as WB from 0 -> CACHE_TMP_RAMTOP. */
70 postcar_frame_add_mtrr(&pcf, 0, CACHE_TMP_RAMTOP, MTRR_TYPE_WRBACK);
71
72 /* Save the number of MTRRs to setup. Return the stack location
73 * pointing to the number of MTRRs.
74 */
75 return postcar_commit_mtrrs(&pcf);
76}
77#endif /* CONFIG_LATE_CBMEM_INIT */