blob: 9148892f36a1137bfce43b6426e19c555eb69c6f [file] [log] [blame]
Nicolas Reinecke29d358e2015-01-31 19:20:50 +01001chip northbridge/intel/sandybridge
Nico Huberb0b25c82020-03-21 20:35:12 +01002 register "gfx" = "GMA_STATIC_DISPLAYS(1)"
Nicolas Reinecke29d358e2015-01-31 19:20:50 +01003
4 # Enable DisplayPort Hotplug with 6ms pulse
5 register "gpu_dp_d_hotplug" = "0x06"
6
7 # Enable Panel as LVDS and configure power delays
Angel Ponsdc0c0812020-09-02 19:17:30 +02008 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Nicolas Reinecke29d358e2015-01-31 19:20:50 +01009 register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms
10 register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms
11 register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
12 register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
13 register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010014 register "gpu_cpu_backlight" = "0x1155"
15 register "gpu_pch_backlight" = "0x11551155"
16
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010017 device domain 0 on
Peter Lemenkovb8b97862019-11-27 23:04:49 +010018 subsystemid 0x17aa 0x21fb inherit
19
20 device pci 00.0 on end # host bridge
Patrick Rudolph830fdc72016-04-21 07:15:14 +020021 device pci 01.0 on end # PCIe Bridge for discrete graphics
Peter Lemenkovb8b97862019-11-27 23:04:49 +010022 device pci 02.0 on end # Integrated Graphics Controller
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010023
24 chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH
25 # GPI routing
26 # 0 No effect (default)
27 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
28 # 2 SCI (if corresponding GPIO_EN bit is also set)
29 register "alt_gp_smi_en" = "0x0000"
30 register "gpi1_routing" = "2"
31 register "gpi13_routing" = "2"
32
33 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
34 register "sata_port_map" = "0x17"
35 # Set max SATA speed to 6.0 Gb/s
36 register "sata_interface_speed_support" = "0x3"
37
38 register "gen1_dec" = "0x7c1601"
39 register "gen2_dec" = "0x0c15e1"
40 register "gen4_dec" = "0x0c06a1"
41
42 register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
Bill XIE012ef772018-11-29 20:37:35 +080043 # Wire port 4 (wwan usb) to ehci for it lacks superspeed components
44 register "xhci_switchable_ports" = "0x7"
Nicolas Reineckebcff3bd2015-03-31 01:40:46 +020045 register "superspeed_capable_ports" = "0xf"
46 register "xhci_overcurrent_mapping" = "0x4000201"
47
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010048 # Enable zero-based linear PCIe root port functions
Angel Ponsaf4bd562021-12-28 13:05:56 +010049 register "pcie_port_coalesce" = "true"
Bill XIE012ef772018-11-29 20:37:35 +080050 register "docking_supported" = "1"
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010051
Patrick Rudolphc670a412017-04-28 17:28:32 +020052 register "spi_uvscc" = "0x2005"
53 register "spi_lvscc" = "0x2005"
54
Peter Lemenkovb8b97862019-11-27 23:04:49 +010055 device pci 14.0 on end # USB 3.0 Controller
Evgeny Zinovievb5d402e2020-06-16 04:41:48 +030056 device pci 16.0 on end # Management Engine Interface 1
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010057 device pci 16.1 off end # Management Engine Interface 2
58 device pci 16.2 off end # Management Engine IDE-R
59 device pci 16.3 off end # Management Engine KT
60 device pci 19.0 on
61 subsystemid 0x17aa 0x21f3
62 end # Intel Gigabit Ethernet
Peter Lemenkovb8b97862019-11-27 23:04:49 +010063 device pci 1a.0 on end # USB Enhanced Host Controller #2
64 device pci 1b.0 on end # High Definition Audio Controller
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010065 device pci 1c.0 off end # PCIe Port #1
Peter Lemenkovb8b97862019-11-27 23:04:49 +010066 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010067 device pci 1c.2 on
Patrick Rudolph05216322019-04-12 16:14:27 +020068 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010069 end # PCIe Port #3 ExpressCard
70 device pci 1c.3 off end # PCIe Port #4
71 device pci 1c.4 off end # PCIe Port #5
72 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
73 device pci 1c.6 off end # PCIe Port #7
74 device pci 1c.7 off end # PCIe Port #8
Peter Lemenkovb8b97862019-11-27 23:04:49 +010075 device pci 1d.0 on end # USB Enhanced Host Controller #1
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010076 device pci 1e.0 off end # PCI bridge
77 device pci 1f.0 on
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010078 chip ec/lenovo/pmh7
Peter Lemenkovb8b97862019-11-27 23:04:49 +010079 device pnp ff.1 on end # dummy
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010080 register "backlight_enable" = "0x01"
81 register "dock_event_enable" = "0x01"
82 end
83
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +020084 chip drivers/pc80/tpm
85 device pnp 0c31.0 on end
86 end
87
Nicolas Reinecke29d358e2015-01-31 19:20:50 +010088 chip ec/lenovo/h8
89 device pnp ff.2 on # dummy
90 io 0x60 = 0x62
91 io 0x62 = 0x66
92 io 0x64 = 0x1600
93 io 0x66 = 0x1604
94 end
95
96 register "config0" = "0xa7"
97 register "config1" = "0x05"
98 register "config2" = "0xa0"
99 register "config3" = "0xe2"
100
101 register "has_keyboard_backlight" = "1"
102
103 register "beepmask0" = "0x00"
104 register "beepmask1" = "0x86"
105 register "has_power_management_beeps" = "0"
106 register "event2_enable" = "0xff"
107 register "event3_enable" = "0xff"
108 register "event4_enable" = "0xd0"
109 register "event5_enable" = "0x3c"
110 register "event6_enable" = "0x00"
111 register "event7_enable" = "0x01"
112 register "event8_enable" = "0x7b"
113 register "event9_enable" = "0xff"
114 register "eventa_enable" = "0x00"
115 register "eventb_enable" = "0x00"
116 register "eventc_enable" = "0xff"
117 register "eventd_enable" = "0xff"
118 register "evente_enable" = "0x0d"
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100119 end
120 end # LPC Controller
Peter Lemenkovb8b97862019-11-27 23:04:49 +0100121 device pci 1f.2 on end # 6 port SATA AHCI Controller
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100122 device pci 1f.3 on
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100123 # eeprom, 8 virtual devices, same chip
124 chip drivers/i2c/at24rf08c
125 device i2c 54 on end
126 device i2c 55 on end
127 device i2c 56 on end
128 device i2c 57 on end
129 device i2c 5c on end
130 device i2c 5d on end
131 device i2c 5e on end
132 device i2c 5f on end
133 end
134 end # SMBus Controller
135 device pci 1f.5 off end # SATA Controller 2
Peter Lemenkovb8b97862019-11-27 23:04:49 +0100136 device pci 1f.6 on end # Thermal
Nicolas Reinecke29d358e2015-01-31 19:20:50 +0100137 end
138 end
139end