Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 2 | register "gfx.ndid" = "3" |
| 3 | register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 4 | |
| 5 | # Enable DisplayPort Hotplug with 6ms pulse |
| 6 | register "gpu_dp_d_hotplug" = "0x06" |
| 7 | |
| 8 | # Enable Panel as LVDS and configure power delays |
| 9 | register "gpu_panel_port_select" = "0" # LVDS |
| 10 | register "gpu_panel_power_cycle_delay" = "6" # T7: 500ms |
| 11 | register "gpu_panel_power_up_delay" = "100" # T1+T2: 10ms |
| 12 | register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms |
| 13 | register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms |
| 14 | register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms |
| 15 | register "gfx.use_spread_spectrum_clock" = "1" |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 16 | register "gfx.link_frequency_270_mhz" = "1" |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 17 | register "gpu_cpu_backlight" = "0x1155" |
| 18 | register "gpu_pch_backlight" = "0x11551155" |
| 19 | |
| 20 | device cpu_cluster 0 on |
| 21 | chip cpu/intel/socket_rPGA989 |
| 22 | device lapic 0 on end |
| 23 | end |
| 24 | chip cpu/intel/model_206ax |
| 25 | # Magic APIC ID to locate this chip |
| 26 | device lapic 0xACAC off end |
| 27 | |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 28 | register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) |
| 29 | register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) |
| 30 | register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7) |
| 31 | |
| 32 | register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1) |
| 33 | register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3) |
| 34 | register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7) |
| 35 | end |
| 36 | end |
| 37 | |
| 38 | device domain 0 on |
| 39 | device pci 00.0 on |
| 40 | subsystemid 0x17aa 0x21fb |
| 41 | end # host bridge |
Patrick Rudolph | 830fdc7 | 2016-04-21 07:15:14 +0200 | [diff] [blame^] | 42 | device pci 01.0 on end # PCIe Bridge for discrete graphics |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 43 | device pci 02.0 on |
| 44 | subsystemid 0x17aa 0x21fb |
| 45 | end # Integrated Graphics Controller |
| 46 | |
| 47 | chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH |
| 48 | # GPI routing |
| 49 | # 0 No effect (default) |
| 50 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 51 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 52 | register "alt_gp_smi_en" = "0x0000" |
| 53 | register "gpi1_routing" = "2" |
| 54 | register "gpi13_routing" = "2" |
| 55 | |
| 56 | # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock) |
| 57 | register "sata_port_map" = "0x17" |
| 58 | # Set max SATA speed to 6.0 Gb/s |
| 59 | register "sata_interface_speed_support" = "0x3" |
| 60 | |
| 61 | register "gen1_dec" = "0x7c1601" |
| 62 | register "gen2_dec" = "0x0c15e1" |
| 63 | register "gen4_dec" = "0x0c06a1" |
| 64 | |
| 65 | register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" |
| 66 | |
Nicolas Reinecke | bcff3bd | 2015-03-31 01:40:46 +0200 | [diff] [blame] | 67 | register "xhci_switchable_ports" = "0xf" |
| 68 | register "superspeed_capable_ports" = "0xf" |
| 69 | register "xhci_overcurrent_mapping" = "0x4000201" |
| 70 | |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 71 | # Enable zero-based linear PCIe root port functions |
| 72 | register "pcie_port_coalesce" = "1" |
| 73 | register "c2_latency" = "101" # c2 not supported |
| 74 | register "p_cnt_throttling_supported" = "1" |
| 75 | |
| 76 | device pci 14.0 on |
| 77 | subsystemid 0x17aa 0x21fb |
| 78 | end # USB 3.0 Controller |
| 79 | device pci 16.0 off end # Management Engine Interface 1 |
| 80 | device pci 16.1 off end # Management Engine Interface 2 |
| 81 | device pci 16.2 off end # Management Engine IDE-R |
| 82 | device pci 16.3 off end # Management Engine KT |
| 83 | device pci 19.0 on |
| 84 | subsystemid 0x17aa 0x21f3 |
| 85 | end # Intel Gigabit Ethernet |
| 86 | device pci 1a.0 on |
| 87 | subsystemid 0x17aa 0x21fb |
| 88 | end # USB Enhanced Host Controller #2 |
| 89 | device pci 1b.0 on |
| 90 | subsystemid 0x17aa 0x21fb |
| 91 | end # High Definition Audio Controller |
| 92 | device pci 1c.0 off end # PCIe Port #1 |
| 93 | device pci 1c.1 on |
| 94 | subsystemid 0x17aa 0x21fb |
| 95 | end # PCIe Port #2 Integrated Wireless LAN |
| 96 | device pci 1c.2 on |
| 97 | subsystemid 0x17aa 0x21fb |
| 98 | end # PCIe Port #3 ExpressCard |
| 99 | device pci 1c.3 off end # PCIe Port #4 |
| 100 | device pci 1c.4 off end # PCIe Port #5 |
| 101 | device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) |
| 102 | device pci 1c.6 off end # PCIe Port #7 |
| 103 | device pci 1c.7 off end # PCIe Port #8 |
| 104 | device pci 1d.0 on |
| 105 | subsystemid 0x17aa 0x21fb |
| 106 | end # USB Enhanced Host Controller #1 |
| 107 | device pci 1e.0 off end # PCI bridge |
| 108 | device pci 1f.0 on |
| 109 | subsystemid 0x17aa 0x21fb |
| 110 | chip ec/lenovo/pmh7 |
| 111 | device pnp ff.1 on # dummy |
| 112 | end |
| 113 | register "backlight_enable" = "0x01" |
| 114 | register "dock_event_enable" = "0x01" |
| 115 | end |
| 116 | |
Philipp Deppenwiese | 3d02b9c | 2015-06-03 23:09:36 +0200 | [diff] [blame] | 117 | chip drivers/pc80/tpm |
| 118 | device pnp 0c31.0 on end |
| 119 | end |
| 120 | |
Nicolas Reinecke | 29d358e | 2015-01-31 19:20:50 +0100 | [diff] [blame] | 121 | chip ec/lenovo/h8 |
| 122 | device pnp ff.2 on # dummy |
| 123 | io 0x60 = 0x62 |
| 124 | io 0x62 = 0x66 |
| 125 | io 0x64 = 0x1600 |
| 126 | io 0x66 = 0x1604 |
| 127 | end |
| 128 | |
| 129 | register "config0" = "0xa7" |
| 130 | register "config1" = "0x05" |
| 131 | register "config2" = "0xa0" |
| 132 | register "config3" = "0xe2" |
| 133 | |
| 134 | register "has_keyboard_backlight" = "1" |
| 135 | |
| 136 | register "beepmask0" = "0x00" |
| 137 | register "beepmask1" = "0x86" |
| 138 | register "has_power_management_beeps" = "0" |
| 139 | register "event2_enable" = "0xff" |
| 140 | register "event3_enable" = "0xff" |
| 141 | register "event4_enable" = "0xd0" |
| 142 | register "event5_enable" = "0x3c" |
| 143 | register "event6_enable" = "0x00" |
| 144 | register "event7_enable" = "0x01" |
| 145 | register "event8_enable" = "0x7b" |
| 146 | register "event9_enable" = "0xff" |
| 147 | register "eventa_enable" = "0x00" |
| 148 | register "eventb_enable" = "0x00" |
| 149 | register "eventc_enable" = "0xff" |
| 150 | register "eventd_enable" = "0xff" |
| 151 | register "evente_enable" = "0x0d" |
| 152 | end |
| 153 | end # LPC Controller |
| 154 | device pci 1f.2 on |
| 155 | subsystemid 0x17aa 0x21fb |
| 156 | end # 6 port SATA AHCI Controller |
| 157 | device pci 1f.3 on |
| 158 | subsystemid 0x17aa 0x21fb |
| 159 | # eeprom, 8 virtual devices, same chip |
| 160 | chip drivers/i2c/at24rf08c |
| 161 | device i2c 54 on end |
| 162 | device i2c 55 on end |
| 163 | device i2c 56 on end |
| 164 | device i2c 57 on end |
| 165 | device i2c 5c on end |
| 166 | device i2c 5d on end |
| 167 | device i2c 5e on end |
| 168 | device i2c 5f on end |
| 169 | end |
| 170 | end # SMBus Controller |
| 171 | device pci 1f.5 off end # SATA Controller 2 |
| 172 | device pci 1f.6 on |
| 173 | subsystemid 0x17aa 0x21fb |
| 174 | end # Thermal |
| 175 | end |
| 176 | end |
| 177 | end |