| Shaunak Saha | bd42780 | 2017-07-18 00:19:33 -0700 | [diff] [blame] | 1 | config SOC_INTEL_COMMON_BLOCK_ACPI |
| 2 | depends on SOC_INTEL_COMMON_BLOCK_CPU |
| 3 | depends on SOC_INTEL_COMMON_BLOCK_PMC |
| 4 | bool |
| 5 | help |
| 6 | Intel Processor common code for ACPI |
| Michael Niewöhner | 89e83b7 | 2020-11-12 23:47:30 +0100 | [diff] [blame] | 7 | |
| Angel Pons | 98f672a | 2021-02-19 19:42:10 +0100 | [diff] [blame^] | 8 | config SOC_INTEL_COMMON_BLOCK_ACPI_GPIO |
| 9 | bool |
| 10 | |
| Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 11 | config SOC_INTEL_COMMON_BLOCK_ACPI_LPIT |
| 12 | bool |
| 13 | depends on HAVE_ACPI_TABLES |
| 14 | select ACPI_LPIT |
| 15 | help |
| Francois Toguo | 15cbc3b | 2021-01-26 10:27:49 -0800 | [diff] [blame] | 16 | Generate LPIT table with LPI state entries |
| 17 | |
| 18 | config SOC_INTEL_COMMON_BLOCK_CRASHLOG |
| 19 | bool |
| 20 | depends on SOC_INTEL_CRASHLOG |
| 21 | help |
| 22 | Generate crash data for BERT table |
| Michael Niewöhner | f0a44ae | 2021-01-01 21:04:09 +0100 | [diff] [blame] | 23 | |
| Michael Niewöhner | 89e83b7 | 2020-11-12 23:47:30 +0100 | [diff] [blame] | 24 | if SOC_INTEL_COMMON_BLOCK_ACPI |
| 25 | |
| 26 | config SOC_INTEL_COMMON_BLOCK_ACPI_CPPC |
| 27 | bool |
| 28 | help |
| 29 | Generate CPPC entries for Intel SpeedShift |
| 30 | |
| Francois Toguo | 15cbc3b | 2021-01-26 10:27:49 -0800 | [diff] [blame] | 31 | |
| Michael Niewöhner | 89e83b7 | 2020-11-12 23:47:30 +0100 | [diff] [blame] | 32 | endif |