Angel Pons | a21dff6 | 2020-04-03 01:22:24 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 2 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 3 | #include <bootblock_common.h> |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 4 | #include <stdint.h> |
Elyes HAOUAS | 92c4bc1 | 2020-08-26 20:07:31 +0200 | [diff] [blame] | 5 | #include <device/pnp_def.h> |
Kyösti Mälkki | 3855c01 | 2019-03-03 08:45:19 +0200 | [diff] [blame] | 6 | #include <device/pnp_ops.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 7 | #include <device/pci_ops.h> |
Elyes HAOUAS | 8c905a8 | 2019-02-07 09:00:47 +0100 | [diff] [blame] | 8 | #include <device/pci_def.h> |
Vladimir Serbinenko | a50478f | 2016-02-10 03:03:41 +0100 | [diff] [blame] | 9 | #include <northbridge/intel/sandybridge/raminit_native.h> |
Elyes HAOUAS | 8c905a8 | 2019-02-07 09:00:47 +0100 | [diff] [blame] | 10 | #include <northbridge/intel/sandybridge/raminit.h> |
| 11 | #include <northbridge/intel/sandybridge/sandybridge.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 12 | #include <southbridge/intel/bd82x6x/pch.h> |
Patrick Rudolph | e8e66f4 | 2016-02-06 17:42:42 +0100 | [diff] [blame] | 13 | #include <southbridge/intel/common/gpio.h> |
Elyes HAOUAS | e051dc0 | 2018-08-06 10:55:59 +0200 | [diff] [blame] | 14 | #include <superio/winbond/common/winbond.h> |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 15 | |
Arthur Heymans | 2b28a16 | 2019-11-12 17:21:08 +0100 | [diff] [blame] | 16 | void mainboard_pch_lpc_setup(void) |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 17 | { |
| 18 | /* Set COM3/COM1 decode ranges: 0x3e8/0x3f8 */ |
| 19 | pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0070); |
| 20 | |
| 21 | /* Enable KBC on 0x06/0x64 (KBC), |
| 22 | * EC on 0x62/0x66 (MC), |
| 23 | * EC on 0x20c-0x20f (GAMEH), |
| 24 | * Super I/O on 0x2e/0x2f (CNF1), |
| 25 | * COM1/COM3 decode ranges. */ |
| 26 | pci_write_config16(PCH_LPC_DEV, LPC_EN, |
| 27 | KBC_LPC_EN | MC_LPC_EN | |
| 28 | CNF1_LPC_EN | GAMEH_LPC_EN | |
| 29 | COMA_LPC_EN | COMB_LPC_EN); |
| 30 | } |
| 31 | |
Arthur Heymans | fa5d0f8 | 2019-11-12 19:11:50 +0100 | [diff] [blame] | 32 | void bootblock_mainboard_early_init(void) |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 33 | { |
Elyes HAOUAS | f10b5ff | 2016-10-06 19:49:55 +0200 | [diff] [blame] | 34 | int lvds_3v = 0; /* 0 (5V) or 1 (3V3) */ |
| 35 | int dis_bl_inv = 1; /* backlight inversion: 1 = disabled, 0 = enabled */ |
Elyes HAOUAS | efc3d04 | 2020-04-08 12:15:16 +0200 | [diff] [blame] | 36 | const pnp_devfn_t dev = PNP_DEV(0x2e, 0x9); |
Elyes HAOUAS | e051dc0 | 2018-08-06 10:55:59 +0200 | [diff] [blame] | 37 | pnp_enter_conf_state(dev); |
Nico Huber | 40f9ce9 | 2013-10-22 11:07:23 +0200 | [diff] [blame] | 38 | pnp_write_config(dev, 0x29, 0x02); /* Pins 119, 120 are GPIO21, 20 */ |
Elyes HAOUAS | 92c4bc1 | 2020-08-26 20:07:31 +0200 | [diff] [blame] | 39 | pnp_write_config(dev, PNP_IDX_EN, 0x03); /* Enable GPIO2+3 */ |
Nico Huber | 40f9ce9 | 2013-10-22 11:07:23 +0200 | [diff] [blame] | 40 | pnp_write_config(dev, 0x2a, 0x01); /* Pins 62, 63, 65, 66 are |
| 41 | GPIO27, 26, 25, 24 */ |
| 42 | pnp_write_config(dev, 0x2c, 0xc3); /* Pin 90 is GPIO32, |
| 43 | Pins 78~85 are UART B */ |
| 44 | pnp_write_config(dev, 0x2d, 0x00); /* Pins 67, 68, 70~73, 75, 77 are |
| 45 | GPIO57~50 */ |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 46 | pnp_set_logical_device(dev); |
| 47 | /* Values can only be changed, when devices are enabled. */ |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 48 | pnp_write_config(dev, 0xe3, 0xdd); /* GPIO2 bits 1, 5 are output */ |
Nico Huber | 40f9ce9 | 2013-10-22 11:07:23 +0200 | [diff] [blame] | 49 | pnp_write_config(dev, 0xe4, (dis_bl_inv << 5) | (lvds_3v << 1)); /* GPIO2 bits 1, 5 */ |
Elyes HAOUAS | 92c4bc1 | 2020-08-26 20:07:31 +0200 | [diff] [blame] | 50 | /* Disable suspend LED during normal operation */ |
| 51 | pnp_write_config(dev, PNP_IDX_MSC3, 0x40); |
Elyes HAOUAS | e051dc0 | 2018-08-06 10:55:59 +0200 | [diff] [blame] | 52 | pnp_exit_conf_state(dev); |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 53 | } |
| 54 | |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 55 | void mainboard_fill_pei_data(struct pei_data *pei_data) |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 56 | { |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 57 | struct pei_data pei_data_template = { |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 58 | .pei_version = PEI_VERSION, |
Angel Pons | d9e58dc | 2021-01-20 01:22:20 +0100 | [diff] [blame] | 59 | .mchbar = CONFIG_FIXED_MCHBAR_MMIO_BASE, |
| 60 | .dmibar = CONFIG_FIXED_DMIBAR_MMIO_BASE, |
| 61 | .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE, |
Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 62 | .pciexbar = CONFIG_ECAM_MMCONF_BASE_ADDRESS, |
Angel Pons | b21bffa | 2020-07-03 01:02:28 +0200 | [diff] [blame] | 63 | .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE, |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 64 | .wdbbar = 0x4000000, |
| 65 | .wdbsize = 0x1000, |
| 66 | .hpet_address = CONFIG_HPET_ADDRESS, |
Angel Pons | 92717ff | 2020-09-14 16:22:22 +0200 | [diff] [blame] | 67 | .rcba = (uintptr_t)DEFAULT_RCBA, |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 68 | .pmbase = DEFAULT_PMBASE, |
| 69 | .gpiobase = DEFAULT_GPIOBASE, |
| 70 | .thermalbase = 0xfed08000, |
Elyes HAOUAS | f10b5ff | 2016-10-06 19:49:55 +0200 | [diff] [blame] | 71 | .system_type = 0, /* 0 Mobile, 1 Desktop/Server */ |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 72 | .tseg_size = CONFIG_SMM_TSEG_SIZE, |
| 73 | .spd_addresses = { 0xA0, 0x00,0xA4,0x00 }, |
| 74 | .ts_addresses = { 0x00, 0x00, 0x00, 0x00 }, |
| 75 | .ec_present = 1, |
| 76 | .gbe_enable = 1, |
| 77 | .ddr3lv_support = 0, |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 78 | .max_ddr3_freq = 1600, |
| 79 | .usb_port_config = { |
Elyes HAOUAS | 44f558e | 2020-02-24 13:26:04 +0100 | [diff] [blame] | 80 | /* enabled USB oc pin length */ |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 81 | { 1, 0, 0x0040 }, /* P0: lower left USB 3.0 (OC0) */ |
| 82 | { 1, 0, 0x0040 }, /* P1: upper left USB 3.0 (OC0) */ |
| 83 | { 1, 0, 0x0040 }, /* P2: lower right USB 3.0 (OC0) */ |
| 84 | { 1, 0, 0x0040 }, /* P3: upper right USB 3.0 (OC0) */ |
| 85 | { 1, 0, 0x0040 }, /* P4: lower USB 2.0 (OC0) */ |
| 86 | { 1, 0, 0x0040 }, /* P5: upper USB 2.0 (OC0) */ |
| 87 | { 1, 0, 0x0040 }, /* P6: front panel USB 2.0 (OC0) */ |
| 88 | { 1, 0, 0x0040 }, /* P7: front panel USB 2.0 (OC0) */ |
| 89 | { 1, 4, 0x0040 }, /* P8: internal USB 2.0 (OC4) */ |
| 90 | { 1, 4, 0x0040 }, /* P9: internal USB 2.0 (OC4) */ |
| 91 | { 1, 4, 0x0040 }, /* P10: internal USB 2.0 (OC4) */ |
| 92 | { 1, 4, 0x0040 }, /* P11: internal USB 2.0 (OC4) */ |
| 93 | { 1, 4, 0x0040 }, /* P12: internal USB 2.0 (OC4) */ |
| 94 | { 1, 4, 0x0040 }, /* P13: internal USB 2.0 (OC4) */ |
| 95 | }, |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 96 | .usb3 = { |
| 97 | .mode = 3, /* Smart Auto? */ |
| 98 | .hs_port_switch_mask = 0xf, /* All four ports. */ |
| 99 | .preboot_support = 1, /* preOS driver? */ |
| 100 | .xhci_streams = 1, /* Enable. */ |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 101 | }, |
Edward O'Callaghan | 6f49f69 | 2014-05-24 02:04:52 +1000 | [diff] [blame] | 102 | .pcie_init = 1, |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 103 | }; |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 104 | *pei_data = pei_data_template; |
| 105 | } |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 106 | |
Vladimir Serbinenko | a50478f | 2016-02-10 03:03:41 +0100 | [diff] [blame] | 107 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
Elyes HAOUAS | 44f558e | 2020-02-24 13:26:04 +0100 | [diff] [blame] | 108 | /* enabled power USB oc pin */ |
Vladimir Serbinenko | a50478f | 2016-02-10 03:03:41 +0100 | [diff] [blame] | 109 | { 1, 0, 0 }, /* P0: lower left USB 3.0 (OC0) */ |
| 110 | { 1, 0, 0 }, /* P1: upper left USB 3.0 (OC0) */ |
| 111 | { 1, 0, 0 }, /* P2: lower right USB 3.0 (OC0) */ |
| 112 | { 1, 0, 0 }, /* P3: upper right USB 3.0 (OC0) */ |
| 113 | { 1, 0, 0 }, /* P4: lower USB 2.0 (OC0) */ |
| 114 | { 1, 0, 0 }, /* P5: upper USB 2.0 (OC0) */ |
| 115 | { 1, 0, 0 }, /* P6: front panel USB 2.0 (OC0) */ |
| 116 | { 1, 0, 0 }, /* P7: front panel USB 2.0 (OC0) */ |
| 117 | { 1, 0, 4 }, /* P8: internal USB 2.0 (OC4) */ |
| 118 | { 1, 0, 4 }, /* P9: internal USB 2.0 (OC4) */ |
| 119 | { 1, 0, 4 }, /* P10: internal USB 2.0 (OC4) */ |
| 120 | { 1, 0, 4 }, /* P11: internal USB 2.0 (OC4) */ |
| 121 | { 1, 0, 4 }, /* P12: internal USB 2.0 (OC4) */ |
| 122 | { 1, 0, 4 }, /* P13: internal USB 2.0 (OC4) */ |
| 123 | }; |
| 124 | |
Peter Lemenkov | 498f1cc | 2019-02-07 10:48:10 +0100 | [diff] [blame] | 125 | void mainboard_get_spd(spd_raw_data *spd, bool id_only) |
| 126 | { |
Kyösti Mälkki | e258b9a | 2016-11-18 19:59:23 +0200 | [diff] [blame] | 127 | read_spd(&spd[0], 0x50, id_only); |
| 128 | read_spd(&spd[2], 0x52, id_only); |
Vladimir Serbinenko | a50478f | 2016-02-10 03:03:41 +0100 | [diff] [blame] | 129 | } |
| 130 | |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 131 | void mainboard_early_init(int s3resume) |
| 132 | { |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 133 | /* Enable PEG10 (1x16) */ |
| 134 | pci_write_config32(PCI_DEV(0, 0, 0), DEVEN, |
| 135 | pci_read_config32(PCI_DEV(0, 0, 0), DEVEN) | |
| 136 | DEVEN_PEG10); |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 137 | } |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 138 | |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 139 | int mainboard_should_reset_usb(int s3resume) |
| 140 | { |
| 141 | return !s3resume; |
Nico Huber | efe1fed | 2013-04-29 18:00:57 +0200 | [diff] [blame] | 142 | } |