mb/{asrock,intel,kontron}: Include missing <arch/io.h>
Also includes lines sorted
Change-Id: Idf2b41f471f531b2a9c3e620563e3c658dea4729
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31267
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index 9083764..ea93e05 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -16,18 +16,20 @@
#include <stdint.h>
#include <string.h>
-#include <timestamp.h>
-#include <device/pci_def.h>
-#include <cpu/x86/lapic.h>
#include <arch/acpi.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
-#include <northbridge/intel/sandybridge/raminit.h>
+#include <arch/io.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/x86/msr.h>
+#include <device/pci_def.h>
+#include <halt.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <northbridge/intel/sandybridge/raminit.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <southbridge/intel/common/gpio.h>
-#include <cpu/x86/msr.h>
-#include <halt.h>
#include <superio/winbond/common/winbond.h>
+#include <timestamp.h>
+
void pch_enable_lpc(void)
{