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Uwe Hermann0120e1a2007-09-16 18:11:03 +00001/*
Uwe Hermannafe83092007-09-28 15:45:43 +00002 * This file is part of the superiotool project.
Uwe Hermann0120e1a2007-09-16 18:11:03 +00003 *
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
Uwe Hermannebb73f22008-11-12 19:08:58 +00005 * Copyright (C) 2007-2008 Uwe Hermann <uwe@hermann-uwe.de>
Edward O'Callaghan5b5f8342014-01-26 00:19:58 +11006 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
Wilbert Duijvenvoorde21648312014-03-12 11:19:31 +01007 * Copyright (C) 2014 Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com>
Uwe Hermann0120e1a2007-09-16 18:11:03 +00008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Uwe Hermann0120e1a2007-09-16 18:11:03 +000018 */
19
20#include "superiotool.h"
21
Uwe Hermann07024692007-09-20 22:13:48 +000022#define DEVICE_ID_BYTE1_REG 0x20
23#define DEVICE_ID_BYTE2_REG 0x21
Uwe Hermann945045b2007-09-28 15:39:10 +000024
Uwe Hermann07024692007-09-20 22:13:48 +000025#define VENDOR_ID_BYTE1_REG 0x23
26#define VENDOR_ID_BYTE2_REG 0x24
27
Uwe Hermann6b4ad432007-09-23 13:17:29 +000028#define FINTEK_VENDOR_ID 0x3419
29
Uwe Hermann246be7d2007-10-31 22:22:11 +000030static const struct superio_registers reg_table[] = {
Uwe Hermannebb73f22008-11-12 19:08:58 +000031 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
Arjan Koers78fdd602009-06-26 15:16:21 +000032 /* We assume reserved bits are read as 0. */
33 {NOLDN, NULL,
34 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
35 0x2b,0x2c,0x2d,EOT},
36 {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
37 0x00,0x00,0x08,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000038 {0x0, "Floppy",
Arjan Koers78fdd602009-06-26 15:16:21 +000039 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
40 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000041 {0x1, "COM1",
Arjan Koers78fdd602009-06-26 15:16:21 +000042 {0x30,0x60,0x61,0x70,0xf0,EOT},
43 {0x01,0x03,0xf8,0x04,0x00,EOT}},
Uwe Hermann4bdd6432010-05-14 16:40:55 +000044 {0x2, "COM2",
Arjan Koers78fdd602009-06-26 15:16:21 +000045 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
46 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
47 {0x3, "Parallel port",
48 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
49 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
50 {0x4, "Hardware monitor",
51 {0x30,0x60,0x61,0x70,EOT},
52 {0x01,0x02,0x95,0x00,EOT}},
53 {0x5, "Keyboard",
54 {0x30,0x60,0x61,0x70,0x72,EOT},
55 {0x01,0x00,0x60,0x00,0x00,EOT}},
56 {0x6, "GPIO",
57 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
58 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
59 EOT},
60 {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
61 NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
62 EOT}},
63 {0x7, "VID",
64 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
65 0xf7,EOT},
66 {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
67 0x00,EOT}},
68 {0x8, "SPI",
69 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
70 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
71 {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
72 0x00,0x00,0x00,0x00,0x00,EOT}},
73 {0xa, "PME, ACPI",
74 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
75 {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +000076 {EOT}}},
Wilbert Duijvenvoordeffdf2e12014-03-24 10:02:42 +010077 {0x0710, "F71869A/AD", {
Edward O'Callaghan5b5f8342014-01-26 00:19:58 +110078 /* We assume reserved bits are read as 0. */
79 {NOLDN, NULL,
Wilbert Duijvenvoordeffdf2e12014-03-24 10:02:42 +010080 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
81 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
82 {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
83 0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
Edward O'Callaghan5b5f8342014-01-26 00:19:58 +110084 {0x0, "Floppy",
85 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
86 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
87 {0x1, "COM1",
88 {0x30,0x60,0x61,0x70,0xf0,EOT},
89 {0x01,0x03,0xf8,0x04,0x00,EOT}},
90 {0x2, "COM2",
91 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
92 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
93 {0x3, "Parallel port",
94 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
95 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
96 {0x4, "Hardware monitor",
97 {0x30,0x60,0x61,0x70,EOT},
98 {0x01,0x02,0x95,0x00,EOT}},
99 {0x5, "Keyboard",
100 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
101 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
102 {0x6, "GPIO",
103 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
104 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
Wilbert Duijvenvoordeffdf2e12014-03-24 10:02:42 +0100105 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
106 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
107 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
Edward O'Callaghan5b5f8342014-01-26 00:19:58 +1100108 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
109 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
Wilbert Duijvenvoordeffdf2e12014-03-24 10:02:42 +0100110 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
111 0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
112 0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
113 {0x7, "WDT",
114 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
115 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
116 {0x8, "CIR",
117 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
118 0xfc,0xfd,0xfe,EOT},
119 {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
120 0x00,0x00,0x00,EOT}},
121 {0xa, "PME, ACPI, and ERP Power Saving",
122 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
123 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
124 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
125 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
126 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
127 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
Wilbert Duijvenvoorde21648312014-03-12 11:19:31 +0100128 {EOT}}},
129 {0x1408, "F71869E/ED", {
130 /* We assume reserved bits are read as 0. */
131 {NOLDN, NULL,
132 {0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
133 0x2a,0x2b,0x2d,EOT},
134 {0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
135 0x07,0x0f,0x28,EOT}},
136 {0x00, "FDC",
137 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
138 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
139 {0x01, "UART1",
140 {0x30,0x60,0x61,0x70,0xf0,EOT},
141 {0x01,0x03,0xf8,0x04,0x00,EOT}},
142 {0x02, "UART2",
143 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
144 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
145 {0x03, "Parallel port",
146 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
147 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
148 {0x04, "Hardware Monitor",
149 {0x30,0x60,0x61,0x70,EOT},
150 {0x01,0x02,0x95,0x00,EOT}},
151 {0x05, "KBC",
152 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
153 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
154 {0x06, "GPIO",
155 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
156 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
157 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
158 0x90,0x91,0x92,0x93,EOT},
159 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
160 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
161 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
162 0x00,0x3f,NANA,0x00,EOT}},
163 {0x07, "WDT",
164 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
165 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
166 {0x0a, "PME, ACPI, and EUP Power Saving",
167 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
168 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
169 0xf8,0xf9,0xfe,EOT},
170 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
171 0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
172 0x00,0x00,0x00,EOT}},
173 {EOT}}},
David Hendricksb97030d2010-11-29 11:56:39 +0000174 {0x2307, "F71889", {
175 /* We assume reserved bits are read as 0. */
176 {NOLDN, NULL,
177 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
178 0x2c,0x2d,EOT},
179 {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
180 0x00,0x08,EOT}},
181 {0x0, "Floppy",
182 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
183 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
184 {0x1, "COM1",
185 {0x30,0x60,0x61,0x70,0xf0,EOT},
186 {0x01,0x03,0xf8,0x04,0x00,EOT}},
187 {0x2, "COM2",
188 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
189 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
190 {0x3, "Parallel port",
191 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
192 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
193 {0x4, "Hardware monitor",
194 {0x30,0x60,0x61,0x70,EOT},
195 {0x01,0x02,0x95,0x00,EOT}},
196 {0x5, "Keyboard",
197 {0x30,0x60,0x61,0x70,0x72,0xfe,EOT},
198 {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}},
199 {0x6, "GPIO",
200 {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
201 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
202 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
203 0xf3,0xfe,0xff,EOT},
204 {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f,
205 NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00,
206 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA,
207 0x00,0x00,0x00,EOT}},
208 {0x7, "VID",
209 {0x30,0x60,0x61,EOT},
210 {0x00,0x00,0x00,EOT}},
211 {0x8, "SPI",
212 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
213 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
214 {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
215 0x00,0x00,0x00,0x00,0x00,EOT}},
216 {0xa, "PME, ACPI",
217 {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT},
218 {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}},
219 {0xb, "VREF",
220 {0xf0,0xf1,0xf2,0xf3,0xff,EOT},
221 {0x64,0x64,0x64,0x00,0x00,EOT}},
222 {EOT}}},
Uwe Hermann945045b2007-09-28 15:39:10 +0000223 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
Jonathan Kollaschd74c7742010-10-24 12:43:41 +0000224 {NOLDN, NULL,
225 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
226 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
227 {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
228 0x80,0x00,0x00,0x00,0x04,EOT}},
229 {0x0, "Floppy",
230 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
231 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
232 {0x1, "COM1",
233 {0x30,0x60,0x61,0x70,0xf0,EOT},
234 {0x01,0x03,0xf8,0x04,0x00,EOT}},
235 {0x2, "COM2",
236 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
237 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
238 {0x3, "Parallel port",
239 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
240 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
241 {0x4, "Hardware monitor",
242 {0x30,0x60,0x61,0x70,EOT},
243 {0x00,0x02,0x95,0x00,EOT}},
Uwe Hermann70159892010-10-24 14:19:09 +0000244 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
Jonathan Kollaschd74c7742010-10-24 12:43:41 +0000245 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
246 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
247 {0x6, "GPIO",
248 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
249 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
250 EOT},
251 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
252 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
253 EOT}},
254 {0x7, "VID",
255 {0x30,0x60,0x61,EOT},
256 {0x00,0x00,0x00,EOT}},
257 {0xa, "PME, ACPI",
258 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
259 {0x00,0x00,0x61,0x06,0x3c,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +0000260 {EOT}}},
261 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
Uwe Hermann0323a2b2008-10-09 23:56:11 +0000262 /* We assume reserved bits are read as 0. */
263 {NOLDN, NULL,
264 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
265 0x2b,0x2c,0x2d,EOT},
266 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
267 0x00,0x08,0x08,EOT}},
268 {0x0, "Floppy",
269 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
270 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
271 {0x1, "COM1",
272 {0x30,0x60,0x61,0x70,0xf0,EOT},
273 {0x01,0x03,0xf8,0x04,0x00,EOT}},
274 {0x2, "COM2",
275 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
276 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
277 {0x3, "Parallel port",
278 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
279 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
280 {0x4, "Hardware monitor",
281 {0x30,0x60,0x61,0x70,EOT},
282 {0x01,0x02,0x95,0x00,EOT}},
283 {0x5, "Keyboard",
284 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
285 {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
286 {0x6, "GPIO",
287 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
288 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
289 0xf3,EOT},
290 {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
291 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
292 0x00,EOT}},
293 {0x7, "VID",
294 {0x30,0x60,0x61,EOT},
295 {0x00,0x00,0x00,EOT}},
296 {0x7, "SPI",
297 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
298 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
299 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
300 0x00,0x00,0x00,0x00,0x00,EOT}},
301 {0xa, "PME, ACPI",
302 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
303 {0x00,0x00,0x01,0x06,0x1c,EOT}},
Uwe Hermann945045b2007-09-28 15:39:10 +0000304 {EOT}}},
305 {0x0604, "F71805F/FG", {
Uwe Hermanne0ffaa12007-09-26 15:48:09 +0000306 /* We assume reserved bits are read as 0. */
307 {NOLDN, NULL,
Uwe Hermannb0ae9762008-10-14 16:34:38 +0000308 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
309 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
Uwe Hermanne0ffaa12007-09-26 15:48:09 +0000310 {0x0, "Floppy",
311 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
312 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
313 {0x1, "COM1",
314 {0x30,0x60,0x61,0x70,0xf0,EOT},
315 {0x01,0x03,0xf8,0x04,0x00,EOT}},
316 {0x2, "COM2",
317 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
318 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
319 {0x3, "Parallel port",
320 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
321 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
322 {0x4, "Hardware monitor",
323 {0x30,0x60,0x61,0x70,EOT},
324 {0x00,0x02,0x95,0x00,EOT}},
325 {0x6, "GPIO",
326 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
327 0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
328 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
329 0x00,0x00,NANA,0x00,NANA,EOT}},
330 {0xa, "PME",
331 {0x30,0xf0,0xf1,EOT},
332 {0x00,0x00,0x00,EOT}},
Uwe Hermann07024692007-09-20 22:13:48 +0000333 {EOT}}},
Uwe Hermanncfb6ac72008-10-01 20:16:58 +0000334 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
335 {EOT}}},
Stefan Reinauere7b7ae22010-08-17 08:24:01 +0000336 {0x0802, "F81216D/DG", {
337 {NOLDN, NULL,
338 {0x25,0x2f,EOT},
339 {0x00,RSVD,EOT}},
340 {0x0, "UART1",
341 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
342 {NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
343 {0x1, "UART2",
344 {0x30,0x60,0x61,0x70,0xf0,EOT},
345 {NANA,NANA,NANA,NANA,0x00,EOT}},
346 {0x2, "UART3",
347 {0x30,0x60,0x61,0x70,0xf0,EOT},
348 {NANA,NANA,NANA,NANA,0x00,EOT}},
349 {0x3, "UART4",
350 {0x30,0x60,0x61,0x70,0xf0,EOT},
351 {NANA,NANA,NANA,NANA,0x00,EOT}},
352 {0x8, "WDT",
353 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
354 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
355 {EOT}}},
356 {0x1602, "F81216AD", {
357 {NOLDN, NULL,
358 {0x25,0x27,EOT},
359 {0x00,NANA,EOT}},
360 {0x0, "UART1",
361 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
362 {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
363 {0x1, "UART2",
364 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
365 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
366 {0x2, "UART3",
367 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
368 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
369 {0x3, "UART4",
370 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
371 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
372 {0x8, "WDT",
373 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
374 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
375 {EOT}}},
Zheng Bao0e40e6b2010-11-05 00:34:12 +0000376 {0x0407, "F81865F/F-I", {
Stefan Taunere54995a2012-09-06 10:38:49 +0200377 {NOLDN, NULL,
378 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a-1,0x2a-2,0x2b,0x2c,0x2d,EOT},
379 {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
380 {0x00, "FDC",
381 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
382 {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
383 {0x03, "LPT",
384 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
385 {NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
386 {0x04, "HWMON",
387 {0x30,0x60,0x61,0x70,EOT},
388 {NANA,0x02,0x95,NANA,EOT}},
389 {0x05, "KBC",
390 {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
391 {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
392 {0x06, "GPIO",
393 {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
394 {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
395 {0x07, "WDT",
396 {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
397 {NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
398 {0x08, "SPI",
399 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
400 {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
401 {0x0a, "PME & ACPI",
402 {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
403 {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
404 {0x0b, "RTC",
405 {0x30,0x60,0x61,0x70,EOT},
406 {NANA,0x00,0x00,NANA,EOT}},
407 {0x10, "UART1",
408 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
409 {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
410 {0x11, "UART2",
411 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
412 {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
413 {0x12, "UART3",
414 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
415 {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
416 {0x13, "UART4",
417 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
418 {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
419 {0x14, "UART5",
420 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
421 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
422 {0x15, "UART6",
423 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
424 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
Zheng Bao0e40e6b2010-11-05 00:34:12 +0000425 {EOT}}},
Uwe Hermann07024692007-09-20 22:13:48 +0000426 {EOT}
427};
428
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000429void probe_idregs_fintek(uint16_t port)
430{
Uwe Hermannb4db2202007-09-20 23:37:56 +0000431 uint16_t vid, did;
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000432
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000433 probing_for("Fintek", "", port);
434
Uwe Hermannb4db2202007-09-20 23:37:56 +0000435 enter_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000436
Uwe Hermann07024692007-09-20 22:13:48 +0000437 did = regval(port, DEVICE_ID_BYTE1_REG);
438 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
Uwe Hermann07024692007-09-20 22:13:48 +0000439
440 vid = regval(port, VENDOR_ID_BYTE1_REG);
441 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
442
Uwe Hermann6b4ad432007-09-23 13:17:29 +0000443 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000444 if (verbose)
445 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
Uwe Hermannb4db2202007-09-20 23:37:56 +0000446 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann07024692007-09-20 22:13:48 +0000447 return;
448 }
449
Uwe Hermann8b8d0392007-10-04 15:23:38 +0000450 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
Wilbert Duijvenvoorde21648312014-03-12 11:19:31 +0100451 get_superio_name(reg_table, did), vid, did, port);
Uwe Hermanne9d46162007-10-07 20:01:23 +0000452 chip_found = 1;
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000453
Stefan Reinauer7a51e502008-12-01 14:18:57 +0000454 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000455
Uwe Hermannb4db2202007-09-20 23:37:56 +0000456 exit_conf_mode_winbond_fintek_ite_8787(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000457}
Robinson P. Tryon552cfb72008-01-15 22:30:55 +0000458
Stefan Reinauere7b7ae22010-08-17 08:24:01 +0000459
460void probe_idregs_fintek_alternative(uint16_t port)
461{
462 uint16_t vid, did;
463
464 probing_for("Fintek", "", port);
465
466 enter_conf_mode_fintek_7777(port);
467
468 did = regval(port, DEVICE_ID_BYTE1_REG);
469 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
470
471 vid = regval(port, VENDOR_ID_BYTE1_REG);
472 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
473
474 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
475 if (verbose)
476 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
477 exit_conf_mode_fintek_7777(port);
478 return;
479 }
480
481 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
Wilbert Duijvenvoorde21648312014-03-12 11:19:31 +0100482 get_superio_name(reg_table, did), vid, did, port);
Stefan Reinauere7b7ae22010-08-17 08:24:01 +0000483 chip_found = 1;
484
485 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
486
487 exit_conf_mode_fintek_7777(port);
488}
489
Robinson P. Tryon552cfb72008-01-15 22:30:55 +0000490void print_fintek_chips(void)
491{
492 print_vendor_chips("Fintek", reg_table);
493}