Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 AMD |
| 5 | * Written by Yinghai Lu <yinghai.lu@amd.com> for AMD. |
| 6 | * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS) |
| 7 | * Written by Morgan Tsai <my_tsai@sis.com> for SiS. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 18 | */ |
| 19 | |
Stefan Reinauer | 6f57b51 | 2010-07-08 16:41:05 +0000 | [diff] [blame] | 20 | void sis966_early_pcie_setup(unsigned busnx, unsigned devnx, unsigned anactrl_io_base, unsigned pci_e_x) |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 21 | { |
| 22 | uint32_t tgio_ctrl; |
| 23 | uint32_t pll_ctrl; |
| 24 | uint32_t dword; |
| 25 | int i; |
| 26 | device_t dev; |
| 27 | dev = PCI_DEV(busnx, devnx+1, 1); |
| 28 | dword = pci_read_config32(dev, 0xe4); |
| 29 | dword |= 0x3f0; // disable it at first |
| 30 | pci_write_config32(dev, 0xe4, dword); |
| 31 | |
| 32 | for(i=0; i<3; i++) { |
| 33 | tgio_ctrl = inl(anactrl_io_base + 0xcc); |
| 34 | tgio_ctrl &= ~(3<<9); |
| 35 | tgio_ctrl |= (i<<9); |
| 36 | outl(tgio_ctrl, anactrl_io_base + 0xcc); |
| 37 | pll_ctrl = inl(anactrl_io_base + 0x30); |
| 38 | pll_ctrl |= (1<<31); |
| 39 | outl(pll_ctrl, anactrl_io_base + 0x30); |
| 40 | do { |
| 41 | pll_ctrl = inl(anactrl_io_base + 0x30); |
| 42 | } while (!(pll_ctrl & 1)); |
| 43 | } |
| 44 | tgio_ctrl = inl(anactrl_io_base + 0xcc); |
| 45 | tgio_ctrl &= ~((7<<4)|(1<<8)); |
| 46 | tgio_ctrl |= (pci_e_x<<4)|(1<<8); |
| 47 | outl(tgio_ctrl, anactrl_io_base + 0xcc); |
| 48 | |
| 49 | // wait 100us |
Morgan Tsai | 218c265 | 2007-11-02 16:09:58 +0000 | [diff] [blame] | 50 | udelay(100); |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 51 | |
| 52 | dword = pci_read_config32(dev, 0xe4); |
| 53 | dword &= ~(0x3f0); // enable |
| 54 | pci_write_config32(dev, 0xe4, dword); |
| 55 | |
| 56 | // need to wait 100ms |
Morgan Tsai | 218c265 | 2007-11-02 16:09:58 +0000 | [diff] [blame] | 57 | mdelay(100); |
Morgan Tsai | 1602dd5 | 2007-10-29 21:00:14 +0000 | [diff] [blame] | 58 | } |