Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Uwe Hermann <uwe@hermann-uwe.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 17 | #include <stdint.h> |
| 18 | #include <device/pci_def.h> |
| 19 | #include <device/pci_ids.h> |
| 20 | #include <arch/io.h> |
| 21 | #include <device/pnp_def.h> |
Edwin Beasant | eb50c7d | 2010-07-06 21:05:04 +0000 | [diff] [blame] | 22 | #include <pc80/mc146818rtc.h> |
Patrick Georgi | 12584e2 | 2010-05-08 09:14:51 +0000 | [diff] [blame] | 23 | #include <console/console.h> |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 24 | #include <lib.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 25 | #include <northbridge/via/cn700/raminit.h> |
| 26 | #include <cpu/x86/bist.h> |
Stefan Reinauer | ae5e11d | 2012-04-27 02:31:28 +0200 | [diff] [blame] | 27 | #include "drivers/pc80/udelay_io.c" |
Edward O'Callaghan | ebe3a7a | 2015-01-05 00:27:54 +1100 | [diff] [blame] | 28 | #include <delay.h> |
stepan | 836ae29 | 2010-12-08 05:42:47 +0000 | [diff] [blame] | 29 | #include "southbridge/via/vt8237r/early_smbus.c" |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 30 | #include <superio/ite/common/ite.h> |
Edward O'Callaghan | 5c41ee6 | 2014-04-23 01:43:38 +1000 | [diff] [blame] | 31 | #include <superio/ite/it8716f/it8716f.h> |
Uwe Hermann | 6dc92f0 | 2010-11-21 11:36:03 +0000 | [diff] [blame] | 32 | #include <spd.h> |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 33 | |
| 34 | #define SERIAL_DEV PNP_DEV(0x2e, IT8716F_SP1) |
| 35 | |
| 36 | static int spd_read_byte(u16 device, u16 address) |
| 37 | { |
| 38 | return smbus_read_byte(device, address); |
| 39 | } |
| 40 | |
| 41 | #include "northbridge/via/cn700/raminit.c" |
| 42 | |
| 43 | static const struct mem_controller ctrl = { |
| 44 | .d0f0 = 0x0000, |
| 45 | .d0f2 = 0x2000, |
| 46 | .d0f3 = 0x3000, |
| 47 | .d0f4 = 0x4000, |
| 48 | .d0f7 = 0x7000, |
| 49 | .d1f0 = 0x8000, |
Uwe Hermann | d773fd3 | 2010-11-20 20:23:08 +0000 | [diff] [blame] | 50 | .channel0 = { DIMM0 }, /* TODO: CN700 currently only supports 1 DIMM. */ |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 51 | }; |
| 52 | |
Aaron Durbin | a0a3727 | 2014-08-14 08:35:11 -0500 | [diff] [blame] | 53 | #include <cpu/intel/romstage.h> |
Stefan Reinauer | 314e551 | 2010-04-09 20:36:29 +0000 | [diff] [blame] | 54 | void main(unsigned long bist) |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 55 | { |
| 56 | /* Enable multifunction for northbridge. */ |
| 57 | pci_write_config8(ctrl.d0f0, 0x4f, 0x01); |
| 58 | |
Edward O'Callaghan | f292002 | 2014-04-27 00:41:50 +1000 | [diff] [blame] | 59 | ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 60 | console_init(); |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 61 | enable_smbus(); |
| 62 | smbus_fixup(&ctrl); |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 63 | report_bist_failure(bist); |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 64 | ddr_ram_setup(&ctrl); |
Uwe Hermann | 2e5a9d9 | 2008-10-12 11:58:26 +0000 | [diff] [blame] | 65 | } |