Angel Pons | 4b42983 | 2020-04-02 23:48:50 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
Iru Cai | d7ee9dd | 2016-02-24 15:03:58 +0800 | [diff] [blame] | 3 | #ifndef NORTHBRIDGE_INTEL_HASWELL_CHIP_H |
| 4 | #define NORTHBRIDGE_INTEL_HASWELL_CHIP_H |
| 5 | |
Michael Niewöhner | 97e21d3 | 2020-12-28 00:49:33 +0100 | [diff] [blame] | 6 | #include <drivers/intel/gma/gma.h> |
Angel Pons | ae99950 | 2020-11-05 01:58:34 +0100 | [diff] [blame] | 7 | #include <types.h> |
| 8 | |
| 9 | struct peg_config { |
| 10 | bool is_onboard; |
| 11 | uint8_t power_limit_scale; |
| 12 | uint8_t power_limit_value; |
| 13 | uint16_t phys_slot_number; |
| 14 | }; |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 15 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 16 | /* |
| 17 | * Digital Port Hotplug Enable: |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 18 | * 0x04 = Enabled, 2ms short pulse |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 19 | * 0x05 = Enabled, 4.5ms short pulse |
Angel Pons | 1db5bc7 | 2020-01-15 00:49:03 +0100 | [diff] [blame] | 20 | * 0x06 = Enabled, 6ms short pulse |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 21 | * 0x07 = Enabled, 100ms short pulse |
| 22 | */ |
| 23 | struct northbridge_intel_haswell_config { |
| 24 | u8 gpu_dp_b_hotplug; /* Digital Port B Hotplug Config */ |
| 25 | u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */ |
| 26 | u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */ |
| 27 | |
Michael Niewöhner | 97e21d3 | 2020-12-28 00:49:33 +0100 | [diff] [blame] | 28 | /* IGD panel configuration */ |
| 29 | struct i915_gpu_panel_config panel_cfg; |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 30 | |
Angel Pons | ae99950 | 2020-11-05 01:58:34 +0100 | [diff] [blame] | 31 | struct peg_config peg_cfg[3]; |
| 32 | |
Tristan Corrick | 1a73eb0 | 2018-10-31 02:27:29 +1300 | [diff] [blame] | 33 | bool gpu_ddi_e_connected; |
| 34 | |
Angel Pons | 8aab787 | 2020-07-04 01:24:59 +0200 | [diff] [blame] | 35 | bool ec_present; |
| 36 | |
| 37 | bool dq_pins_interleaved; |
| 38 | |
| 39 | bool usb_xhci_on_resume; |
| 40 | |
Vladimir Serbinenko | dd2bc3f | 2014-10-31 09:16:31 +0100 | [diff] [blame] | 41 | struct i915_gpu_controller_info gfx; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 42 | }; |
| 43 | |
Iru Cai | d7ee9dd | 2016-02-24 15:03:58 +0800 | [diff] [blame] | 44 | #endif /* NORTHBRIDGE_INTEL_HASWELL_CHIP_H */ |