nb/intel/haswell/pcie.c: Add missing pre-ASPM init
Add devicetree configuration parameters for mainboard-specific settings,
and provide reasonable defaults, which should usually be good enough.
This is based on Haswell SA Reference Code version 1.9.0 (Nov 2014).
Tested on Asrock B85M Pro4, registers now have the expected values.
Change-Id: I0dcdd4ca431c2ae1e62f2719c376d8bdef3054bd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47223
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h
index 99102b6..274e549 100644
--- a/src/northbridge/intel/haswell/chip.h
+++ b/src/northbridge/intel/haswell/chip.h
@@ -4,6 +4,14 @@
#define NORTHBRIDGE_INTEL_HASWELL_CHIP_H
#include <drivers/intel/gma/gma.h>
+#include <types.h>
+
+struct peg_config {
+ bool is_onboard;
+ uint8_t power_limit_scale;
+ uint8_t power_limit_value;
+ uint16_t phys_slot_number;
+};
/*
* Digital Port Hotplug Enable:
@@ -20,6 +28,8 @@
/* IGD panel configuration */
struct i915_gpu_panel_config panel_cfg;
+ struct peg_config peg_cfg[3];
+
bool gpu_ddi_e_connected;
bool ec_present;