Angel Pons | 30a511c | 2020-04-03 01:22:09 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 2 | |
| 3 | #include <types.h> |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 4 | #include <console/console.h> |
| 5 | #include <device/device.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 6 | #include <option.h> |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 7 | #include <superio/hwm5_conf.h> |
Felix Held | 734c999 | 2019-12-27 18:00:53 +0100 | [diff] [blame] | 8 | #include <superio/nuvoton/common/hwm.h> |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 9 | |
| 10 | #include "superio_hwm.h" |
| 11 | |
| 12 | /* Hardware Monitor */ |
| 13 | |
| 14 | #define FAN_CRUISE_CONTROL_DISABLED 0 |
| 15 | #define FAN_CRUISE_CONTROL_SPEED 1 |
| 16 | #define FAN_CRUISE_CONTROL_THERMAL 2 |
| 17 | |
| 18 | #define FAN_SPEED_5625 0 |
| 19 | //#define FAN_TEMPERATURE_30DEGC 0 |
| 20 | |
| 21 | #define HWM_BASE 0x290 |
| 22 | |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 23 | struct fan_speed { |
| 24 | u8 fan_in; |
| 25 | u16 fan_speed; |
| 26 | }; |
| 27 | |
| 28 | // FANIN Target Speed Register |
| 29 | // FANIN = 337500 / RPM |
| 30 | struct fan_speed fan_speeds[] = { |
| 31 | { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 }, |
| 32 | { 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 }, |
| 33 | { 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 }, |
| 34 | { 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 } |
| 35 | }; |
| 36 | |
| 37 | struct temperature { |
| 38 | u8 deg_celsius; |
| 39 | u8 deg_fahrenheit; |
| 40 | }; |
| 41 | |
| 42 | struct temperature temperatures[] = { |
| 43 | { 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 }, |
| 44 | { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 }, |
| 45 | { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 }, |
| 46 | { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 } |
| 47 | }; |
| 48 | |
| 49 | void hwm_setup(void) |
| 50 | { |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame^] | 51 | unsigned int cpufan_control = 0, sysfan_control = 0; |
| 52 | unsigned int cpufan_speed = 0, sysfan_speed = 0; |
| 53 | unsigned int cpufan_temperature = 0, sysfan_temperature = 0; |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 54 | |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame^] | 55 | cpufan_control = get_uint_option("cpufan_cruise_control", FAN_CRUISE_CONTROL_DISABLED); |
| 56 | cpufan_speed = get_uint_option("cpufan_speed", FAN_SPEED_5625); |
| 57 | //cpufan_temperature = get_uint_option("cpufan_temperature", FAN_TEMPERATURE_30DEGC); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 58 | |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame^] | 59 | sysfan_control = get_uint_option("sysfan_cruise_control", FAN_CRUISE_CONTROL_DISABLED); |
| 60 | sysfan_speed = get_uint_option("sysfan_speed", FAN_SPEED_5625); |
| 61 | //sysfan_temperature = get_uint_option("sysfan_temperature", FAN_TEMPERATURE_30DEGC); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 62 | |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 63 | // pnp_write_hwm5_index(HWM_BASE, 0x31, 0x20); // AVCC high limit |
| 64 | // pnp_write_hwm5_index(HWM_BASE, 0x34, 0x06); // VIN2 low limit |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 65 | |
Felix Held | 734c999 | 2019-12-27 18:00:53 +0100 | [diff] [blame] | 66 | nuvoton_hwm_select_bank(HWM_BASE, 0); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 67 | pnp_write_hwm5_index(HWM_BASE, 0x59, 0x20); // Diode Selection |
| 68 | pnp_write_hwm5_index(HWM_BASE, 0x5d, 0x0f); // All Sensors Diode, not Thermistor |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 69 | |
Felix Held | 734c999 | 2019-12-27 18:00:53 +0100 | [diff] [blame] | 70 | nuvoton_hwm_select_bank(HWM_BASE, 4); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 71 | pnp_write_hwm5_index(HWM_BASE, 0x54, 0xf1); // SYSTIN temperature offset |
| 72 | pnp_write_hwm5_index(HWM_BASE, 0x55, 0x19); // CPUTIN temperature offset |
| 73 | pnp_write_hwm5_index(HWM_BASE, 0x56, 0xfc); // AUXTIN temperature offset |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 74 | |
Felix Held | 734c999 | 2019-12-27 18:00:53 +0100 | [diff] [blame] | 75 | nuvoton_hwm_select_bank(HWM_BASE, 0x80); // Default |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 76 | |
| 77 | u8 fan_config = 0; |
| 78 | // 00 FANOUT is Manual Mode |
| 79 | // 01 FANOUT is Thermal Cruise Mode |
| 80 | // 10 FANOUT is Fan Speed Cruise Mode |
| 81 | switch (cpufan_control) { |
| 82 | case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 4); break; |
| 83 | case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break; |
| 84 | } |
| 85 | switch (sysfan_control) { |
| 86 | case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 2); break; |
| 87 | case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break; |
| 88 | } |
| 89 | // This register must be written first |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 90 | pnp_write_hwm5_index(HWM_BASE, 0x04, fan_config); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 91 | |
| 92 | switch (cpufan_control) { |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 93 | case FAN_CRUISE_CONTROL_SPEED: /* CPUFANIN target speed */ |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 94 | printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n", |
| 95 | fan_speeds[cpufan_speed].fan_speed); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 96 | pnp_write_hwm5_index(HWM_BASE, 0x06, fan_speeds[cpufan_speed].fan_in); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 97 | break; |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 98 | case FAN_CRUISE_CONTROL_THERMAL: /* CPUFANIN target temperature */ |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 99 | printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n", |
| 100 | temperatures[cpufan_temperature].deg_celsius, |
| 101 | temperatures[cpufan_temperature].deg_fahrenheit); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 102 | pnp_write_hwm5_index(HWM_BASE, 0x06, |
| 103 | temperatures[cpufan_temperature].deg_celsius); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 104 | break; |
| 105 | } |
| 106 | |
| 107 | switch (sysfan_control) { |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 108 | case FAN_CRUISE_CONTROL_SPEED: /* SYSFANIN target speed */ |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 109 | printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n", |
| 110 | fan_speeds[sysfan_speed].fan_speed); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 111 | pnp_write_hwm5_index(HWM_BASE, 0x05, fan_speeds[sysfan_speed].fan_in); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 112 | break; |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 113 | case FAN_CRUISE_CONTROL_THERMAL: /* SYSFANIN target temperature */ |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 114 | printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n", |
| 115 | temperatures[sysfan_temperature].deg_celsius, |
| 116 | temperatures[sysfan_temperature].deg_fahrenheit); |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 117 | pnp_write_hwm5_index(HWM_BASE, |
| 118 | 0x05, temperatures[sysfan_temperature].deg_celsius); |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 119 | break; |
| 120 | } |
| 121 | |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 122 | pnp_write_hwm5_index(HWM_BASE, 0x0e, 0x02); // Fan Output Step Down Time |
| 123 | pnp_write_hwm5_index(HWM_BASE, 0x0f, 0x02); // Fan Output Step Up Time |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 124 | |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 125 | pnp_write_hwm5_index(HWM_BASE, 0x47, 0xaf); // FAN divisor register |
| 126 | pnp_write_hwm5_index(HWM_BASE, 0x4b, 0x84); // AUXFANIN speed divisor |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 127 | |
Elyes HAOUAS | edfe125 | 2019-10-08 21:44:02 +0200 | [diff] [blame] | 128 | pnp_write_hwm5_index(HWM_BASE, 0x40, 0x01); // Init, but no SMI# |
Edward O'Callaghan | 3628f93 | 2014-05-21 07:00:48 +1000 | [diff] [blame] | 129 | } |