commit 734c999637357ef62c305c8dfd559def176b00ff
author Felix Held <felix-coreboot@felixheld.de> Fri Dec 27 18:00:53 2019 +0100
committer Felix Held <felix-coreboot@felixheld.de> Mon Dec 30 02:57:37 2019 +0000
tree ba399550dc45d455d4c4730ccf2733ec2711e17b
parent 35103fd961bb5fed318dd3b842582648541586e3

ibase/mb899: use common winbond/nuvoton HWM bank select function

Change-Id: I7f159074c25a0fdfe2ee15024c1ed6c062ce75d5
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37949
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/ibase/mb899/superio_hwm.c

diff --git a/src/mainboard/ibase/mb899/superio_hwm.c b/src/mainboard/ibase/mb899/superio_hwm.c
index aa88cc7..175c9a0 100644
--- a/src/mainboard/ibase/mb899/superio_hwm.c
+++ b/src/mainboard/ibase/mb899/superio_hwm.c
@@ -19,6 +19,7 @@
 #include <device/device.h>
 #include <pc80/mc146818rtc.h>
 #include <superio/hwm5_conf.h>
+#include <superio/nuvoton/common/hwm.h>
 
 #include "superio_hwm.h"
 
@@ -82,16 +83,16 @@
 	// pnp_write_hwm5_index(HWM_BASE, 0x31, 0x20); // AVCC high limit
 	// pnp_write_hwm5_index(HWM_BASE, 0x34, 0x06); // VIN2 low limit
 
-	pnp_write_hwm5_index(HWM_BASE, 0x4e, 0);
+	nuvoton_hwm_select_bank(HWM_BASE, 0);
 	pnp_write_hwm5_index(HWM_BASE, 0x59, 0x20); // Diode Selection
 	pnp_write_hwm5_index(HWM_BASE, 0x5d, 0x0f); // All Sensors Diode, not Thermistor
 
-	pnp_write_hwm5_index(HWM_BASE, 0x4e, 4);
+	nuvoton_hwm_select_bank(HWM_BASE, 4);
 	pnp_write_hwm5_index(HWM_BASE, 0x54, 0xf1); // SYSTIN temperature offset
 	pnp_write_hwm5_index(HWM_BASE, 0x55, 0x19); // CPUTIN temperature offset
 	pnp_write_hwm5_index(HWM_BASE, 0x56, 0xfc); // AUXTIN temperature offset
 
-	pnp_write_hwm5_index(HWM_BASE, 0x4e, 0x80); // Default
+	nuvoton_hwm_select_bank(HWM_BASE, 0x80); // Default
 
 	u8 fan_config = 0;
 	// 00 FANOUT is Manual Mode