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Edward O'Callaghan3628f932014-05-21 07:00:48 +10001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Edward O'Callaghan3628f932014-05-21 07:00:48 +100015 */
16
17#include <types.h>
Edward O'Callaghan3628f932014-05-21 07:00:48 +100018#include <console/console.h>
19#include <device/device.h>
Kyösti Mälkkicbf95712020-01-05 08:05:45 +020020#include <option.h>
Elyes HAOUASedfe1252019-10-08 21:44:02 +020021#include <superio/hwm5_conf.h>
Felix Held734c9992019-12-27 18:00:53 +010022#include <superio/nuvoton/common/hwm.h>
Edward O'Callaghan3628f932014-05-21 07:00:48 +100023
24#include "superio_hwm.h"
25
26/* Hardware Monitor */
27
28#define FAN_CRUISE_CONTROL_DISABLED 0
29#define FAN_CRUISE_CONTROL_SPEED 1
30#define FAN_CRUISE_CONTROL_THERMAL 2
31
32#define FAN_SPEED_5625 0
33//#define FAN_TEMPERATURE_30DEGC 0
34
35#define HWM_BASE 0x290
36
Edward O'Callaghan3628f932014-05-21 07:00:48 +100037struct fan_speed {
38 u8 fan_in;
39 u16 fan_speed;
40};
41
42// FANIN Target Speed Register
43// FANIN = 337500 / RPM
44struct fan_speed fan_speeds[] = {
45 { 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
46 { 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 },
47 { 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 },
48 { 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 }
49};
50
51struct temperature {
52 u8 deg_celsius;
53 u8 deg_fahrenheit;
54};
55
56struct temperature temperatures[] = {
57 { 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 },
58 { 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
59 { 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
60 { 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
61};
62
63void hwm_setup(void)
64{
65 int cpufan_control = 0, sysfan_control = 0;
66 int cpufan_speed = 0, sysfan_speed = 0;
67 int cpufan_temperature = 0, sysfan_temperature = 0;
68
Varad Gautam06ef0462015-03-11 09:54:41 +053069 cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
70 get_option(&cpufan_control, "cpufan_cruise_control");
71 cpufan_speed = FAN_SPEED_5625;
72 get_option(&cpufan_speed, "cpufan_speed");
73 //cpufan_temperature = FAN_TEMPERATURE_30DEGC;
74 //get_option(&cpufan_temperature, "cpufan_temperature");
Edward O'Callaghan3628f932014-05-21 07:00:48 +100075
Varad Gautam06ef0462015-03-11 09:54:41 +053076 sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
77 get_option(&sysfan_control, "sysfan_cruise_control");
78 sysfan_speed = FAN_SPEED_5625;
79 get_option(&sysfan_speed, "sysfan_speed");
80 //sysfan_temperature = FAN_TEMPERATURE_30DEGC;
81 //get_option(&sysfan_temperature, "sysfan_temperature");
Edward O'Callaghan3628f932014-05-21 07:00:48 +100082
Elyes HAOUASedfe1252019-10-08 21:44:02 +020083 // pnp_write_hwm5_index(HWM_BASE, 0x31, 0x20); // AVCC high limit
84 // pnp_write_hwm5_index(HWM_BASE, 0x34, 0x06); // VIN2 low limit
Edward O'Callaghan3628f932014-05-21 07:00:48 +100085
Felix Held734c9992019-12-27 18:00:53 +010086 nuvoton_hwm_select_bank(HWM_BASE, 0);
Elyes HAOUASedfe1252019-10-08 21:44:02 +020087 pnp_write_hwm5_index(HWM_BASE, 0x59, 0x20); // Diode Selection
88 pnp_write_hwm5_index(HWM_BASE, 0x5d, 0x0f); // All Sensors Diode, not Thermistor
Edward O'Callaghan3628f932014-05-21 07:00:48 +100089
Felix Held734c9992019-12-27 18:00:53 +010090 nuvoton_hwm_select_bank(HWM_BASE, 4);
Elyes HAOUASedfe1252019-10-08 21:44:02 +020091 pnp_write_hwm5_index(HWM_BASE, 0x54, 0xf1); // SYSTIN temperature offset
92 pnp_write_hwm5_index(HWM_BASE, 0x55, 0x19); // CPUTIN temperature offset
93 pnp_write_hwm5_index(HWM_BASE, 0x56, 0xfc); // AUXTIN temperature offset
Edward O'Callaghan3628f932014-05-21 07:00:48 +100094
Felix Held734c9992019-12-27 18:00:53 +010095 nuvoton_hwm_select_bank(HWM_BASE, 0x80); // Default
Edward O'Callaghan3628f932014-05-21 07:00:48 +100096
97 u8 fan_config = 0;
98 // 00 FANOUT is Manual Mode
99 // 01 FANOUT is Thermal Cruise Mode
100 // 10 FANOUT is Fan Speed Cruise Mode
101 switch (cpufan_control) {
102 case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 4); break;
103 case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break;
104 }
105 switch (sysfan_control) {
106 case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 2); break;
107 case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break;
108 }
109 // This register must be written first
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200110 pnp_write_hwm5_index(HWM_BASE, 0x04, fan_config);
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000111
112 switch (cpufan_control) {
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200113 case FAN_CRUISE_CONTROL_SPEED: /* CPUFANIN target speed */
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000114 printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n",
115 fan_speeds[cpufan_speed].fan_speed);
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200116 pnp_write_hwm5_index(HWM_BASE, 0x06, fan_speeds[cpufan_speed].fan_in);
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000117 break;
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200118 case FAN_CRUISE_CONTROL_THERMAL: /* CPUFANIN target temperature */
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000119 printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n",
120 temperatures[cpufan_temperature].deg_celsius,
121 temperatures[cpufan_temperature].deg_fahrenheit);
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200122 pnp_write_hwm5_index(HWM_BASE, 0x06,
123 temperatures[cpufan_temperature].deg_celsius);
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000124 break;
125 }
126
127 switch (sysfan_control) {
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200128 case FAN_CRUISE_CONTROL_SPEED: /* SYSFANIN target speed */
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000129 printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n",
130 fan_speeds[sysfan_speed].fan_speed);
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200131 pnp_write_hwm5_index(HWM_BASE, 0x05, fan_speeds[sysfan_speed].fan_in);
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000132 break;
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200133 case FAN_CRUISE_CONTROL_THERMAL: /* SYSFANIN target temperature */
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000134 printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n",
135 temperatures[sysfan_temperature].deg_celsius,
136 temperatures[sysfan_temperature].deg_fahrenheit);
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200137 pnp_write_hwm5_index(HWM_BASE,
138 0x05, temperatures[sysfan_temperature].deg_celsius);
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000139 break;
140 }
141
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200142 pnp_write_hwm5_index(HWM_BASE, 0x0e, 0x02); // Fan Output Step Down Time
143 pnp_write_hwm5_index(HWM_BASE, 0x0f, 0x02); // Fan Output Step Up Time
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000144
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200145 pnp_write_hwm5_index(HWM_BASE, 0x47, 0xaf); // FAN divisor register
146 pnp_write_hwm5_index(HWM_BASE, 0x4b, 0x84); // AUXFANIN speed divisor
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000147
Elyes HAOUASedfe1252019-10-08 21:44:02 +0200148 pnp_write_hwm5_index(HWM_BASE, 0x40, 0x01); // Init, but no SMI#
Edward O'Callaghan3628f932014-05-21 07:00:48 +1000149}