zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
Paul Menzel | a46a712 | 2013-02-23 18:37:27 +0100 | [diff] [blame] | 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 18 | ## |
| 19 | |
| 20 | config SOUTHBRIDGE_AMD_AGESA_HUDSON |
| 21 | bool |
| 22 | select IOAPIC |
Kyösti Mälkki | 8232bc2 | 2013-09-24 21:04:12 +0300 | [diff] [blame] | 23 | select HAVE_USBDEBUG_OPTIONS |
Kyösti Mälkki | 56892fc | 2013-06-16 17:12:37 +0300 | [diff] [blame] | 24 | select HAVE_HARD_RESET |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 25 | |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 26 | config SOUTHBRIDGE_AMD_AGESA_YANGTZE |
| 27 | bool |
| 28 | select IOAPIC |
Kyösti Mälkki | 8232bc2 | 2013-09-24 21:04:12 +0300 | [diff] [blame] | 29 | select HAVE_USBDEBUG_OPTIONS |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 30 | select HAVE_HARD_RESET |
| 31 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 32 | config SOUTHBRIDGE_AMD_AGESA_AVALON |
| 33 | bool |
| 34 | select IOAPIC |
| 35 | select HAVE_USBDEBUG_OPTIONS |
| 36 | select HAVE_HARD_RESET |
| 37 | |
| 38 | if SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON |
Kyösti Mälkki | 59d0d15 | 2013-06-11 16:30:48 +0300 | [diff] [blame] | 39 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 40 | config BOOTBLOCK_SOUTHBRIDGE_INIT |
| 41 | string |
| 42 | default "southbridge/amd/agesa/hudson/bootblock.c" |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 43 | |
| 44 | config SOUTHBRIDGE_AMD_HUDSON_SKIP_ISA_DMA_INIT |
| 45 | bool |
| 46 | default n |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 47 | |
| 48 | config EHCI_BAR |
| 49 | hex |
Kyösti Mälkki | 59d0d15 | 2013-06-11 16:30:48 +0300 | [diff] [blame] | 50 | default 0xfef00000 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 51 | |
Dave Frodin | 1fa1904 | 2013-06-14 07:11:40 -0600 | [diff] [blame] | 52 | config HUDSON_XHCI_ENABLE |
| 53 | bool "Enable Hudson XHCI Controller" |
| 54 | default y |
| 55 | help |
| 56 | The XHCI controller must be enabled and the XHCI firmware |
| 57 | must be added in order to have USB 3.0 support configured |
| 58 | by coreboot. The OS will be responsible for enabling the XHCI |
| 59 | controller if the the XHCI firmware is available but the |
| 60 | XHCI controller is not enabled by coreboot. |
| 61 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 62 | config HUDSON_XHCI_FWM |
| 63 | bool "Add xhci firmware" |
| 64 | default y |
Dave Frodin | 1fa1904 | 2013-06-14 07:11:40 -0600 | [diff] [blame] | 65 | help |
| 66 | Add Hudson 2/3/4 XHCI Firmware to support the onboard USB 3.0 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 67 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 68 | config HUDSON_DISABLE_IMC |
| 69 | bool |
| 70 | default n |
| 71 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 72 | config HUDSON_IMC_FWM |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 73 | bool "Add IMC firmware" |
| 74 | depends on !HUDSON_DISABLE_IMC |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 75 | default y |
| 76 | help |
| 77 | Add Hudson 2/3/4 IMC Firmware to support the onboard fan control |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 78 | |
| 79 | config HUDSON_GEC_FWM |
Bruce Griffith | 5c2025c | 2013-04-23 14:31:55 -0600 | [diff] [blame] | 80 | bool |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 81 | default n |
| 82 | help |
Bruce Griffith | 5c2025c | 2013-04-23 14:31:55 -0600 | [diff] [blame] | 83 | Add Hudson 2/3/4 GEC Firmware to support the onboard gigabit Ethernet MAC. |
| 84 | Must be connected to a Broadcom B50610 or B50610M PHY on the motherboard. |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 85 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 86 | config HUDSON_PSP |
| 87 | bool |
| 88 | default y if CPU_AMD_AGESA_00730F01 |
| 89 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 90 | config HUDSON_XHCI_FWM_FILE |
| 91 | string "XHCI firmware path and filename" |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 92 | default "3rdparty/southbridge/amd/hudson/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON |
| 93 | default "3rdparty/southbridge/amd/yangtze/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 94 | default "3rdparty/southbridge/amd/avalon/xhci.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 95 | depends on HUDSON_XHCI_FWM |
| 96 | |
| 97 | config HUDSON_IMC_FWM_FILE |
| 98 | string "IMC firmware path and filename" |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 99 | default "3rdparty/southbridge/amd/hudson/imc.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON |
| 100 | default "3rdparty/southbridge/amd/yangtze/imc.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 101 | default "3rdparty/southbridge/amd/avalon/imc.bin" if SOUTHBRIDGE_AMD_AGESA_AVALON |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 102 | depends on HUDSON_IMC_FWM |
| 103 | |
| 104 | config HUDSON_GEC_FWM_FILE |
| 105 | string "GEC firmware path and filename" |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 106 | default "3rdparty/southbridge/amd/hudson/gec.bin" if SOUTHBRIDGE_AMD_AGESA_HUDSON |
| 107 | default "3rdparty/southbridge/amd/yangtze/gec.bin" if SOUTHBRIDGE_AMD_AGESA_YANGTZE |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 108 | depends on HUDSON_GEC_FWM |
| 109 | |
| 110 | config HUDSON_FWM |
| 111 | bool |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 112 | default y if HUDSON_XHCI_FWM || HUDSON_IMC_FWM || HUDSON_GEC_FWM || HUDSON_PSP |
| 113 | default n |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 114 | |
| 115 | if HUDSON_FWM |
| 116 | |
| 117 | config HUDSON_FWM_POSITION |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 118 | hex "Hudson Firmware ROM Position" |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 119 | default 0xFFF20000 if BOARD_ROMSIZE_KB_1024 |
| 120 | default 0xFFE20000 if BOARD_ROMSIZE_KB_2048 |
| 121 | default 0xFFC20000 if BOARD_ROMSIZE_KB_4096 |
| 122 | default 0xFF820000 if BOARD_ROMSIZE_KB_8192 |
| 123 | default 0xFF020000 if BOARD_ROMSIZE_KB_16384 |
| 124 | help |
Dave Frodin | b578627 | 2012-11-06 13:37:08 -0700 | [diff] [blame] | 125 | Hudson requires the firmware MUST be located at |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 126 | a specific address (ROM start address + 0x20000), otherwise |
| 127 | xhci host Controller can not find or load the xhci firmware. |
| 128 | |
| 129 | The firmware start address is dependent on the ROM chip size. |
| 130 | The default offset is 0x20000 from the ROM start address, namely |
Dave Frodin | b578627 | 2012-11-06 13:37:08 -0700 | [diff] [blame] | 131 | 0xFFF20000 if flash chip size is 1M |
| 132 | 0xFFE20000 if flash chip size is 2M |
| 133 | 0xFFC20000 if flash chip size is 4M |
| 134 | 0xFF820000 if flash chip size is 8M |
| 135 | 0xFF020000 if flash chip size is 16M |
Martin Roth | 80e3516 | 2013-01-21 19:33:22 -0700 | [diff] [blame] | 136 | endif # HUDSON_FWM |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 137 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 138 | config AMD_PUBKEY_FILE |
| 139 | depends on HUDSON_PSP |
| 140 | string "AMD public Key" |
| 141 | default "3rdparty/southbridge/amd/avalon/PSP/AmdPubKey.bin" if CPU_AMD_AGESA_00730F01 |
| 142 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 143 | config HUDSON_SATA_MODE |
| 144 | int "SATA Mode" |
| 145 | default 0 |
| 146 | range 0 6 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 147 | help |
| 148 | Select the mode in which SATA should be driven. NATIVE AHCI, or RAID. |
| 149 | The default is NATIVE. |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 150 | 0: NATIVE mode does not require a ROM. |
| 151 | 1: RAID mode must have the two ROM files. |
| 152 | 2: AHCI may work with or without AHCI ROM. It depends on the payload support. |
| 153 | For example, seabios does not require the AHCI ROM. |
| 154 | 3: LEGACY IDE |
| 155 | 4: IDE to AHCI |
| 156 | 5: AHCI7804: ROM Required, and AMD driver required in the OS. |
| 157 | 6: IDE to AHCI7804: ROM Required, and AMD driver required in the OS. |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 158 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 159 | comment "NATIVE" |
| 160 | depends on HUDSON_SATA_MODE = 0 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 161 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 162 | comment "RAID" |
| 163 | depends on HUDSON_SATA_MODE = 1 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 164 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 165 | comment "AHCI" |
| 166 | depends on HUDSON_SATA_MODE = 2 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 167 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 168 | comment "LEGACY IDE" |
| 169 | depends on HUDSON_SATA_MODE = 3 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 170 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 171 | comment "IDE to AHCI" |
| 172 | depends on HUDSON_SATA_MODE = 4 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 173 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 174 | comment "AHCI7804" |
| 175 | depends on HUDSON_SATA_MODE = 5 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 176 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 177 | comment "IDE to AHCI7804" |
| 178 | depends on HUDSON_SATA_MODE = 6 |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 179 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 180 | if HUDSON_SATA_MODE = 2 || HUDSON_SATA_MODE = 5 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 181 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 182 | config AHCI_ROM_ID |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 183 | string "AHCI device PCI IDs" |
| 184 | default "1022,7801" if HUDSON_SATA_MODE = 2 |
| 185 | default "1022,7804" if HUDSON_SATA_MODE = 5 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 186 | |
| 187 | config HUDSON_AHCI_ROM |
| 188 | bool "Add a AHCI ROM" |
| 189 | |
| 190 | config AHCI_ROM_FILE |
| 191 | string "AHCI ROM path and filename" |
| 192 | depends on HUDSON_AHCI_ROM |
| 193 | default "src/southbridge/amd/agesa/hudson/ahci.bin" |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 194 | |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 195 | endif |
| 196 | |
| 197 | if HUDSON_SATA_MODE = 1 |
| 198 | |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 199 | config RAID_ROM_ID |
| 200 | string "RAID device PCI IDs" |
| 201 | default "1022,7802" |
| 202 | help |
| 203 | 1022,7802 for SATA NON-RAID5 module, 1022,7803 for SATA RAID5 mode |
| 204 | |
| 205 | config RAID_ROM_FILE |
| 206 | string "RAID ROM path and filename" |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 207 | default "src/southbridge/amd/agesa/hudson/raid.bin" |
| 208 | |
| 209 | config RAID_MISC_ROM_FILE |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 210 | string "RAID Misc ROM path and filename" |
| 211 | default "src/southbridge/amd/agesa/hudson/misc.bin" |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 212 | |
| 213 | config RAID_MISC_ROM_POSITION |
| 214 | hex "RAID Misc ROM Position" |
| 215 | default 0xFFF00000 |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 216 | help |
| 217 | The RAID ROM requires that the MISC ROM is located between the range |
| 218 | 0xFFF0_0000 to 0xFFF0_FFFF. Also, it must 1K bytes aligned. |
Daniele Forsi | 53847a2 | 2014-07-22 18:00:56 +0200 | [diff] [blame] | 219 | The CONFIG_ROM_SIZE must be larger than 0x100000. |
Kyösti Mälkki | 84693d3 | 2014-11-14 20:56:43 +0200 | [diff] [blame^] | 220 | |
| 221 | endif |
zbao | 246e84b | 2012-07-13 18:47:03 +0800 | [diff] [blame] | 222 | |
Martin Roth | eac220f | 2013-01-16 09:07:30 -0700 | [diff] [blame] | 223 | config HUDSON_LEGACY_FREE |
| 224 | bool "System is legacy free" |
| 225 | help |
| 226 | Select y if there is no keyboard controller in the system. |
| 227 | This sets variables in AGESA and ACPI. |
Martin Roth | 80e3516 | 2013-01-21 19:33:22 -0700 | [diff] [blame] | 228 | |
WANG Siyuan | b640fd3 | 2014-10-22 13:47:18 +0800 | [diff] [blame] | 229 | config ACPI_ENABLE_THERMAL_ZONE |
| 230 | bool |
| 231 | default y |
| 232 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 233 | endif # SOUTHBRIDGE_AMD_AGESA_HUDSON || SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 234 | |
Bruce Griffith | 1a59039 | 2014-08-10 17:09:15 -0600 | [diff] [blame] | 235 | if SOUTHBRIDGE_AMD_AGESA_YANGTZE || SOUTHBRIDGE_AMD_AGESA_AVALON |
WANG Siyuan | a9b01d1 | 2013-08-21 10:06:25 +0800 | [diff] [blame] | 236 | config AZ_PIN |
| 237 | hex |
| 238 | default 0xaa |
| 239 | help |
| 240 | bit 1,0 - pin 0 |
| 241 | bit 3,2 - pin 1 |
| 242 | bit 5,4 - pin 2 |
| 243 | bit 7,6 - pin 3 |
Siyuan Wang | 9157145 | 2013-07-09 17:32:42 +0800 | [diff] [blame] | 244 | endif |