Tan, Lean Sheng | 4ce4afa | 2020-08-25 18:07:16 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <arch/cpu.h> |
| 4 | #include <console/console.h> |
Subrata Banik | 82f4ca4 | 2021-07-16 13:37:06 +0530 | [diff] [blame^] | 5 | #include <cpu/intel/cpu_ids.h> |
Tan, Lean Sheng | 4ce4afa | 2020-08-25 18:07:16 -0700 | [diff] [blame] | 6 | #include <cpu/intel/microcode.h> |
| 7 | #include <cpu/x86/msr.h> |
| 8 | #include <cpu/x86/name.h> |
| 9 | #include <device/pci.h> |
| 10 | #include <device/pci_ids.h> |
| 11 | #include <device/pci_ops.h> |
Tan, Lean Sheng | 4ce4afa | 2020-08-25 18:07:16 -0700 | [diff] [blame] | 12 | #include <soc/bootblock.h> |
| 13 | #include <soc/pch.h> |
| 14 | #include <soc/pci_devs.h> |
Tan, Lean Sheng | 4ce4afa | 2020-08-25 18:07:16 -0700 | [diff] [blame] | 15 | |
Tan, Lean Sheng | 9440c53 | 2020-09-03 06:40:46 -0700 | [diff] [blame] | 16 | static struct { |
| 17 | uint32_t cpuid; |
| 18 | const char *name; |
| 19 | } cpu_table[] = { |
| 20 | { CPUID_ELKHARTLAKE_A0, "Elkhartlake A0" }, |
Tan, Lean Sheng | 8d2177b | 2021-05-23 23:06:43 -0700 | [diff] [blame] | 21 | { CPUID_ELKHARTLAKE_B0, "Elkhartlake B0/B1" }, |
Tan, Lean Sheng | 9440c53 | 2020-09-03 06:40:46 -0700 | [diff] [blame] | 22 | }; |
| 23 | |
| 24 | static struct { |
| 25 | u16 mchid; |
| 26 | const char *name; |
| 27 | } mch_table[] = { |
Tan, Lean Sheng | 8d2177b | 2021-05-23 23:06:43 -0700 | [diff] [blame] | 28 | { PCI_DEVICE_ID_INTEL_EHL_ID_0, "Elkhartlake SKU-0" }, |
| 29 | { PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake SKU-1" }, |
| 30 | { PCI_DEVICE_ID_INTEL_EHL_ID_1A, "Elkhartlake SKU-1A" }, |
| 31 | { PCI_DEVICE_ID_INTEL_EHL_ID_2, "Elkhartlake SKU-2" }, |
| 32 | { PCI_DEVICE_ID_INTEL_EHL_ID_2_1, "Elkhartlake SKU-2" }, |
| 33 | { PCI_DEVICE_ID_INTEL_EHL_ID_3, "Elkhartlake SKU-3" }, |
| 34 | { PCI_DEVICE_ID_INTEL_EHL_ID_3A, "Elkhartlake SKU-3A" }, |
| 35 | { PCI_DEVICE_ID_INTEL_EHL_ID_4, "Elkhartlake SKU-4" }, |
| 36 | { PCI_DEVICE_ID_INTEL_EHL_ID_5, "Elkhartlake SKU-5" }, |
| 37 | { PCI_DEVICE_ID_INTEL_EHL_ID_6, "Elkhartlake SKU-6" }, |
| 38 | { PCI_DEVICE_ID_INTEL_EHL_ID_7, "Elkhartlake SKU-7" }, |
| 39 | { PCI_DEVICE_ID_INTEL_EHL_ID_8, "Elkhartlake SKU-8" }, |
| 40 | { PCI_DEVICE_ID_INTEL_EHL_ID_9, "Elkhartlake SKU-9" }, |
| 41 | { PCI_DEVICE_ID_INTEL_EHL_ID_10, "Elkhartlake SKU-10" }, |
| 42 | { PCI_DEVICE_ID_INTEL_EHL_ID_11, "Elkhartlake SKU-11" }, |
Tan, Lean Sheng | 9440c53 | 2020-09-03 06:40:46 -0700 | [diff] [blame] | 43 | { PCI_DEVICE_ID_INTEL_EHL_ID_12, "Elkhartlake SKU-12" }, |
| 44 | { PCI_DEVICE_ID_INTEL_EHL_ID_13, "Elkhartlake SKU-13" }, |
| 45 | }; |
| 46 | |
| 47 | static struct { |
| 48 | u16 espiid; |
| 49 | const char *name; |
| 50 | } pch_table[] = { |
| 51 | { PCI_DEVICE_ID_INTEL_MCC_ESPI_0, "Elkhartlake-0" }, |
| 52 | { PCI_DEVICE_ID_INTEL_MCC_ESPI_1, "Elkhartlake-1" }, |
| 53 | { PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" }, |
| 54 | { PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" }, |
| 55 | { PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" }, |
| 56 | }; |
| 57 | |
| 58 | static struct { |
| 59 | u16 igdid; |
| 60 | const char *name; |
| 61 | } igd_table[] = { |
| 62 | { PCI_DEVICE_ID_INTEL_EHL_GT1_1, "Elkhartlake GT1-1" }, |
| 63 | { PCI_DEVICE_ID_INTEL_EHL_GT2_1, "Elkhartlake GT2-1" }, |
| 64 | { PCI_DEVICE_ID_INTEL_EHL_GT1_2, "Elkhartlake GT1-2" }, |
Tan, Lean Sheng | 8d2177b | 2021-05-23 23:06:43 -0700 | [diff] [blame] | 65 | { PCI_DEVICE_ID_INTEL_EHL_GT1_2_1, "Elkhartlake GT1-2-1" }, |
Tan, Lean Sheng | 9440c53 | 2020-09-03 06:40:46 -0700 | [diff] [blame] | 66 | { PCI_DEVICE_ID_INTEL_EHL_GT2_2, "Elkhartlake GT2-2" }, |
| 67 | { PCI_DEVICE_ID_INTEL_EHL_GT1_3, "Elkhartlake GT1-3" }, |
| 68 | { PCI_DEVICE_ID_INTEL_EHL_GT2_3, "Elkhartlake GT2-3" }, |
| 69 | }; |
Tan, Lean Sheng | 4ce4afa | 2020-08-25 18:07:16 -0700 | [diff] [blame] | 70 | |
| 71 | static inline uint8_t get_dev_revision(pci_devfn_t dev) |
| 72 | { |
| 73 | return pci_read_config8(dev, PCI_REVISION_ID); |
| 74 | } |
| 75 | |
| 76 | static inline uint16_t get_dev_id(pci_devfn_t dev) |
| 77 | { |
| 78 | return pci_read_config16(dev, PCI_DEVICE_ID); |
| 79 | } |
| 80 | |
| 81 | static void report_cpu_info(void) |
| 82 | { |
| 83 | uint32_t i, cpu_id, cpu_feature_flag; |
| 84 | char cpu_name[49]; |
| 85 | int vt, txt, aes; |
| 86 | static const char *const mode[] = {"NOT ", ""}; |
| 87 | const char *cpu_type = "Unknown"; |
| 88 | |
| 89 | fill_processor_name(cpu_name); |
| 90 | cpu_id = cpu_get_cpuid(); |
| 91 | |
| 92 | /* Look for string to match the name */ |
| 93 | for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { |
| 94 | if (cpu_table[i].cpuid == cpu_id) { |
| 95 | cpu_type = cpu_table[i].name; |
| 96 | break; |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); |
| 101 | printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", |
| 102 | cpu_id, cpu_type, get_current_microcode_rev()); |
| 103 | |
| 104 | cpu_feature_flag = cpu_get_feature_flags_ecx(); |
| 105 | aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; |
| 106 | txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0; |
| 107 | vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0; |
| 108 | printk(BIOS_DEBUG, |
| 109 | "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", |
| 110 | mode[aes], mode[txt], mode[vt]); |
| 111 | } |
| 112 | |
| 113 | static void report_mch_info(void) |
| 114 | { |
| 115 | int i; |
| 116 | pci_devfn_t dev = SA_DEV_ROOT; |
| 117 | uint16_t mchid = get_dev_id(dev); |
| 118 | uint8_t mch_revision = get_dev_revision(dev); |
| 119 | const char *mch_type = "Unknown"; |
| 120 | |
| 121 | for (i = 0; i < ARRAY_SIZE(mch_table); i++) { |
| 122 | if (mch_table[i].mchid == mchid) { |
| 123 | mch_type = mch_table[i].name; |
| 124 | break; |
| 125 | } |
| 126 | } |
| 127 | |
| 128 | printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n", |
| 129 | mchid, mch_revision, mch_type); |
| 130 | } |
| 131 | |
| 132 | static void report_pch_info(void) |
| 133 | { |
| 134 | int i; |
| 135 | pci_devfn_t dev = PCH_DEV_ESPI; |
| 136 | uint16_t espiid = get_dev_id(dev); |
| 137 | const char *pch_type = "Unknown"; |
| 138 | |
| 139 | for (i = 0; i < ARRAY_SIZE(pch_table); i++) { |
| 140 | if (pch_table[i].espiid == espiid) { |
| 141 | pch_type = pch_table[i].name; |
| 142 | break; |
| 143 | } |
| 144 | } |
| 145 | printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n", |
| 146 | espiid, get_dev_revision(dev), pch_type); |
| 147 | } |
| 148 | |
| 149 | static void report_igd_info(void) |
| 150 | { |
| 151 | int i; |
| 152 | pci_devfn_t dev = SA_DEV_IGD; |
| 153 | uint16_t igdid = get_dev_id(dev); |
| 154 | const char *igd_type = "Unknown"; |
| 155 | |
| 156 | for (i = 0; i < ARRAY_SIZE(igd_table); i++) { |
| 157 | if (igd_table[i].igdid == igdid) { |
| 158 | igd_type = igd_table[i].name; |
| 159 | break; |
| 160 | } |
| 161 | } |
| 162 | printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n", |
| 163 | igdid, get_dev_revision(dev), igd_type); |
| 164 | } |
| 165 | |
| 166 | void report_platform_info(void) |
| 167 | { |
| 168 | report_cpu_info(); |
| 169 | report_mch_info(); |
| 170 | report_pch_info(); |
| 171 | report_igd_info(); |
| 172 | } |