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Tan, Lean Sheng4ce4afa2020-08-25 18:07:16 -07001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <arch/cpu.h>
4#include <console/console.h>
5#include <cpu/intel/microcode.h>
6#include <cpu/x86/msr.h>
7#include <cpu/x86/name.h>
8#include <device/pci.h>
9#include <device/pci_ids.h>
10#include <device/pci_ops.h>
11#include <intelblocks/mp_init.h>
12#include <soc/bootblock.h>
13#include <soc/pch.h>
14#include <soc/pci_devs.h>
15#include <string.h>
16
Tan, Lean Sheng9440c532020-09-03 06:40:46 -070017static struct {
18 uint32_t cpuid;
19 const char *name;
20} cpu_table[] = {
21 { CPUID_ELKHARTLAKE_A0, "Elkhartlake A0" },
22 { CPUID_ELKHARTLAKE_B0, "Elkhartlake B0" },
23};
24
25static struct {
26 u16 mchid;
27 const char *name;
28} mch_table[] = {
29 { PCI_DEVICE_ID_INTEL_EHL_ID_1, "Elkhartlake SKU-0" },
30 { PCI_DEVICE_ID_INTEL_EHL_ID_2, "Elkhartlake SKU-1" },
31 { PCI_DEVICE_ID_INTEL_EHL_ID_3, "Elkhartlake SKU-2" },
32 { PCI_DEVICE_ID_INTEL_EHL_ID_4, "Elkhartlake SKU-3" },
33 { PCI_DEVICE_ID_INTEL_EHL_ID_5, "Elkhartlake SKU-4" },
34 { PCI_DEVICE_ID_INTEL_EHL_ID_6, "Elkhartlake SKU-5" },
35 { PCI_DEVICE_ID_INTEL_EHL_ID_7, "Elkhartlake SKU-6" },
36 { PCI_DEVICE_ID_INTEL_EHL_ID_8, "Elkhartlake SKU-7" },
37 { PCI_DEVICE_ID_INTEL_EHL_ID_9, "Elkhartlake SKU-8" },
38 { PCI_DEVICE_ID_INTEL_EHL_ID_10, "Elkhartlake SKU-9" },
39 { PCI_DEVICE_ID_INTEL_EHL_ID_11, "Elkhartlake SKU-10" },
40 { PCI_DEVICE_ID_INTEL_JSL_EHL, "Elkhartlake SKU-11" },
41 { PCI_DEVICE_ID_INTEL_EHL_ID_12, "Elkhartlake SKU-12" },
42 { PCI_DEVICE_ID_INTEL_EHL_ID_13, "Elkhartlake SKU-13" },
43};
44
45static struct {
46 u16 espiid;
47 const char *name;
48} pch_table[] = {
49 { PCI_DEVICE_ID_INTEL_MCC_ESPI_0, "Elkhartlake-0" },
50 { PCI_DEVICE_ID_INTEL_MCC_ESPI_1, "Elkhartlake-1" },
51 { PCI_DEVICE_ID_INTEL_MCC_BASE_ESPI, "Elkhartlake Base" },
52 { PCI_DEVICE_ID_INTEL_MCC_PREMIUM_ESPI, "Elkhartlake Premium" },
53 { PCI_DEVICE_ID_INTEL_MCC_SUPER_ESPI, "Elkhartlake Super" },
54};
55
56static struct {
57 u16 igdid;
58 const char *name;
59} igd_table[] = {
60 { PCI_DEVICE_ID_INTEL_EHL_GT1_1, "Elkhartlake GT1-1" },
61 { PCI_DEVICE_ID_INTEL_EHL_GT2_1, "Elkhartlake GT2-1" },
62 { PCI_DEVICE_ID_INTEL_EHL_GT1_2, "Elkhartlake GT1-2" },
63 { PCI_DEVICE_ID_INTEL_EHL_GT2_2, "Elkhartlake GT2-2" },
64 { PCI_DEVICE_ID_INTEL_EHL_GT1_3, "Elkhartlake GT1-3" },
65 { PCI_DEVICE_ID_INTEL_EHL_GT2_3, "Elkhartlake GT2-3" },
66};
Tan, Lean Sheng4ce4afa2020-08-25 18:07:16 -070067
68static inline uint8_t get_dev_revision(pci_devfn_t dev)
69{
70 return pci_read_config8(dev, PCI_REVISION_ID);
71}
72
73static inline uint16_t get_dev_id(pci_devfn_t dev)
74{
75 return pci_read_config16(dev, PCI_DEVICE_ID);
76}
77
78static void report_cpu_info(void)
79{
80 uint32_t i, cpu_id, cpu_feature_flag;
81 char cpu_name[49];
82 int vt, txt, aes;
83 static const char *const mode[] = {"NOT ", ""};
84 const char *cpu_type = "Unknown";
85
86 fill_processor_name(cpu_name);
87 cpu_id = cpu_get_cpuid();
88
89 /* Look for string to match the name */
90 for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
91 if (cpu_table[i].cpuid == cpu_id) {
92 cpu_type = cpu_table[i].name;
93 break;
94 }
95 }
96
97 printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
98 printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
99 cpu_id, cpu_type, get_current_microcode_rev());
100
101 cpu_feature_flag = cpu_get_feature_flags_ecx();
102 aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
103 txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
104 vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
105 printk(BIOS_DEBUG,
106 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
107 mode[aes], mode[txt], mode[vt]);
108}
109
110static void report_mch_info(void)
111{
112 int i;
113 pci_devfn_t dev = SA_DEV_ROOT;
114 uint16_t mchid = get_dev_id(dev);
115 uint8_t mch_revision = get_dev_revision(dev);
116 const char *mch_type = "Unknown";
117
118 for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
119 if (mch_table[i].mchid == mchid) {
120 mch_type = mch_table[i].name;
121 break;
122 }
123 }
124
125 printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
126 mchid, mch_revision, mch_type);
127}
128
129static void report_pch_info(void)
130{
131 int i;
132 pci_devfn_t dev = PCH_DEV_ESPI;
133 uint16_t espiid = get_dev_id(dev);
134 const char *pch_type = "Unknown";
135
136 for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
137 if (pch_table[i].espiid == espiid) {
138 pch_type = pch_table[i].name;
139 break;
140 }
141 }
142 printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
143 espiid, get_dev_revision(dev), pch_type);
144}
145
146static void report_igd_info(void)
147{
148 int i;
149 pci_devfn_t dev = SA_DEV_IGD;
150 uint16_t igdid = get_dev_id(dev);
151 const char *igd_type = "Unknown";
152
153 for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
154 if (igd_table[i].igdid == igdid) {
155 igd_type = igd_table[i].name;
156 break;
157 }
158 }
159 printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
160 igdid, get_dev_revision(dev), igd_type);
161}
162
163void report_platform_info(void)
164{
165 report_cpu_info();
166 report_mch_info();
167 report_pch_info();
168 report_igd_info();
169}