Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
| 7 | #include <device/pci_ops.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 8 | #include <device/mmio.h> |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 9 | #include <delay.h> |
Vladimir Serbinenko | 75c8387 | 2014-09-05 01:01:31 +0200 | [diff] [blame] | 10 | #include <device/azalia_device.h> |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 11 | |
| 12 | #include "chip.h" |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 13 | #include "pch.h" |
| 14 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 15 | static int codec_detect(u8 *base) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 16 | { |
| 17 | u8 reg8; |
| 18 | |
Angel Pons | 7f839f6 | 2020-12-05 19:02:14 +0100 | [diff] [blame] | 19 | if (azalia_exit_reset(base) < 0) |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 20 | goto no_codec; |
| 21 | |
| 22 | /* Write back the value once reset bit is set. */ |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 23 | write16(base + HDA_GCAP_REG, read16(base + HDA_GCAP_REG)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 24 | |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 25 | /* Read in Codec location (BAR + 0xe)[2..0] */ |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 26 | reg8 = read8(base + HDA_STATESTS_REG); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 27 | reg8 &= 0x0f; |
| 28 | if (!reg8) |
| 29 | goto no_codec; |
| 30 | |
| 31 | return reg8; |
| 32 | |
| 33 | no_codec: |
Angel Pons | 2e0053b | 2020-12-05 19:06:55 +0100 | [diff] [blame] | 34 | /* Codec not found, put HDA back in reset */ |
| 35 | azalia_enter_reset(base); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 36 | printk(BIOS_DEBUG, "Azalia: No codec!\n"); |
| 37 | return 0; |
| 38 | } |
| 39 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 40 | static void azalia_init(struct device *dev) |
| 41 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 42 | u8 *base; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 43 | struct resource *res; |
| 44 | u32 codec_mask; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 45 | u32 reg32; |
| 46 | |
Angel Pons | f32ae10 | 2021-11-03 13:07:14 +0100 | [diff] [blame] | 47 | res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 48 | if (!res) |
| 49 | return; |
| 50 | |
Martin Roth | 26f97f9 | 2021-10-01 14:53:22 -0600 | [diff] [blame] | 51 | // NOTE this will break as soon as the Azalia gets a bar above 4G. |
Elyes HAOUAS | 6ea24ff | 2020-08-11 09:21:24 +0200 | [diff] [blame] | 52 | // Is there anything we can do about it? |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 53 | base = res2mmio(res, 0, 0); |
Patrick Rudolph | b50b6a5 | 2020-08-20 16:50:01 +0200 | [diff] [blame] | 54 | printk(BIOS_DEBUG, "Azalia: base = %p\n", base); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 55 | |
Patrick Rudolph | 4f8b108 | 2019-07-14 11:54:58 +0200 | [diff] [blame] | 56 | if (RCBA32(CIR31) & (1 << 31)) { |
Kyösti Mälkki | fd98c65 | 2013-07-26 08:50:53 +0300 | [diff] [blame] | 57 | reg32 = pci_read_config32(dev, 0x120); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 58 | reg32 &= 0xf8ffff01; |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 59 | reg32 |= (1 << 24); // 2 << 24 for server |
Patrick Rudolph | 4f8b108 | 2019-07-14 11:54:58 +0200 | [diff] [blame] | 60 | reg32 |= RCBA32(CIR31) & 0xfe; |
Kyösti Mälkki | fd98c65 | 2013-07-26 08:50:53 +0300 | [diff] [blame] | 61 | pci_write_config32(dev, 0x120, reg32); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 62 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 63 | pci_or_config16(dev, 0x78, 1 << 11); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 64 | } else |
| 65 | printk(BIOS_DEBUG, "Azalia: V1CTL disabled.\n"); |
| 66 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 67 | pci_and_config32(dev, 0x114, ~0xfe); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 68 | |
| 69 | // Set VCi enable bit |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 70 | pci_or_config32(dev, 0x120, 1 << 31); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 71 | |
| 72 | // Enable HDMI codec: |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 73 | pci_or_config32(dev, 0xc4, 1 << 1); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 74 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 75 | pci_or_config8(dev, 0x43, 1 << 6); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 76 | |
| 77 | /* Additional programming steps */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 78 | pci_or_config32(dev, 0xc4, 1 << 13); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 79 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 80 | pci_or_config32(dev, 0xc4, 1 << 10); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 81 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 82 | pci_and_config32(dev, 0xd0, ~(1 << 31)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 83 | |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 84 | if (dev->device == 0x1e20) { |
| 85 | /* Additional step on Panther Point */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 86 | pci_or_config32(dev, 0xc4, 1 << 17); |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 87 | } |
| 88 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 89 | /* Set Bus Master */ |
Elyes HAOUAS | 729c069 | 2020-04-28 19:50:44 +0200 | [diff] [blame] | 90 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 91 | |
| 92 | pci_write_config8(dev, 0x3c, 0x0a); // unused? |
| 93 | |
| 94 | /* Codec Initialization Programming Sequence */ |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 95 | |
| 96 | /* Take controller out of reset */ |
Elyes HAOUAS | 11178bd | 2020-08-03 15:34:46 +0200 | [diff] [blame] | 97 | reg32 = read32(base + HDA_GCTL_REG); |
| 98 | reg32 |= HDA_GCTL_CRST; |
| 99 | write32(base + HDA_GCTL_REG, reg32); |
Stefan Reinauer | 15ba2bc | 2012-11-14 12:25:15 -0800 | [diff] [blame] | 100 | /* Wait 1ms */ |
| 101 | udelay(1000); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 102 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 103 | // Select Azalia mode. This needs to be controlled via devicetree.cb |
| 104 | pci_or_config8(dev, 0x40, 1); // Audio Control |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 105 | |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 106 | // Docking not supported |
| 107 | pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 108 | |
| 109 | codec_mask = codec_detect(base); |
| 110 | |
| 111 | if (codec_mask) { |
| 112 | printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); |
Angel Pons | aae6b55 | 2021-11-10 18:10:38 +0100 | [diff] [blame] | 113 | azalia_codecs_init(base, codec_mask); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 114 | } |
| 115 | |
| 116 | /* Enable dynamic clock gating */ |
Angel Pons | c803f65 | 2020-06-07 22:09:01 +0200 | [diff] [blame] | 117 | pci_update_config8(dev, 0x43, ~0x07, (1 << 2) | (1 << 0)); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 118 | } |
| 119 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 120 | static const char *azalia_acpi_name(const struct device *dev) |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 121 | { |
| 122 | return "HDEF"; |
| 123 | } |
| 124 | |
Felix Held | a56ff90 | 2023-11-16 14:20:40 +0100 | [diff] [blame] | 125 | struct device_operations bd82x6x_azalia_ops = { |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 126 | .read_resources = pci_dev_read_resources, |
| 127 | .set_resources = pci_dev_set_resources, |
| 128 | .enable_resources = pci_dev_enable_resources, |
| 129 | .init = azalia_init, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 130 | .ops_pci = &pci_dev_ops_pci, |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 131 | .acpi_name = azalia_acpi_name, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 132 | }; |