Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* This file is part of the coreboot project. */ |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 3 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 4 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 5 | #include <device/pci_ops.h> |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 6 | #include <console/console.h> |
| 7 | #include <device/device.h> |
| 8 | #include <device/pci.h> |
| 9 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 10 | #include <option.h> |
Alexander Couzens | 7bf47ee | 2015-04-16 02:00:21 +0200 | [diff] [blame] | 11 | #include <acpi/sata.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 12 | #include <types.h> |
| 13 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 14 | #include "chip.h" |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 15 | #include "pch.h" |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 16 | |
| 17 | typedef struct southbridge_intel_bd82x6x_config config_t; |
| 18 | |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 19 | static inline u32 sir_read(struct device *dev, int idx) |
| 20 | { |
| 21 | pci_write_config32(dev, SATA_SIRI, idx); |
| 22 | return pci_read_config32(dev, SATA_SIRD); |
| 23 | } |
| 24 | |
| 25 | static inline void sir_write(struct device *dev, int idx, u32 value) |
| 26 | { |
| 27 | pci_write_config32(dev, SATA_SIRI, idx); |
| 28 | pci_write_config32(dev, SATA_SIRD, value); |
| 29 | } |
| 30 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 31 | static void sata_init(struct device *dev) |
| 32 | { |
| 33 | u32 reg32; |
| 34 | u16 reg16; |
| 35 | /* Get the chip configuration */ |
| 36 | config_t *config = dev->chip_info; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 37 | u8 sata_mode; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 38 | |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 39 | printk(BIOS_DEBUG, "SATA: Initializing...\n"); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 40 | |
| 41 | if (config == NULL) { |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 42 | printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n"); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 43 | return; |
| 44 | } |
| 45 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 46 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 47 | /* Default to AHCI */ |
| 48 | sata_mode = 0; |
| 49 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 50 | /* SATA configuration */ |
| 51 | |
| 52 | /* Enable BARs */ |
| 53 | pci_write_config16(dev, PCI_COMMAND, 0x0007); |
| 54 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 55 | /* AHCI */ |
| 56 | if (sata_mode == 0) { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 57 | u8 *abar; |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 58 | |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 59 | printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n"); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 60 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 61 | /* Set timings */ |
| 62 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 63 | IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | |
| 64 | IDE_PPE0 | IDE_IE0 | IDE_TIME0); |
| 65 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
| 66 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 67 | |
| 68 | /* Sync DMA */ |
| 69 | pci_write_config16(dev, IDE_SDMA_CNT, IDE_PSDE0); |
| 70 | pci_write_config16(dev, IDE_SDMA_TIM, 0x0001); |
| 71 | |
| 72 | /* Set IDE I/O Configuration */ |
| 73 | reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
| 74 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 75 | |
| 76 | /* for AHCI, Port Enable is managed in memory mapped space */ |
| 77 | reg16 = pci_read_config16(dev, 0x92); |
| 78 | reg16 &= ~0x3f; /* 6 ports SKU + ORM */ |
| 79 | reg16 |= 0x8000 | config->sata_port_map; |
| 80 | pci_write_config16(dev, 0x92, reg16); |
| 81 | |
| 82 | /* SATA Initialization register */ |
| 83 | pci_write_config32(dev, 0x94, |
| 84 | ((config->sata_port_map ^ 0x3f) << 24) | 0x183); |
| 85 | |
| 86 | /* Initialize AHCI memory-mapped space */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 87 | abar = (u8 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); |
| 88 | printk(BIOS_DEBUG, "ABAR: %p\n", abar); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 89 | /* CAP (HBA Capabilities) : enable power management */ |
| 90 | reg32 = read32(abar + 0x00); |
| 91 | reg32 |= 0x0c006000; // set PSC+SSC+SALP+SSS |
| 92 | reg32 &= ~0x00020060; // clear SXS+EMS+PMS |
Shawn Nematbakhsh | c9fc029 | 2013-03-14 10:44:13 -0700 | [diff] [blame] | 93 | /* Set ISS, if available */ |
| 94 | if (config->sata_interface_speed_support) |
| 95 | { |
| 96 | reg32 &= ~0x00f00000; |
| 97 | reg32 |= (config->sata_interface_speed_support & 0x03) |
| 98 | << 20; |
| 99 | } |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 100 | write32(abar + 0x00, reg32); |
| 101 | /* PI (Ports implemented) */ |
| 102 | write32(abar + 0x0c, config->sata_port_map); |
| 103 | (void) read32(abar + 0x0c); /* Read back 1 */ |
| 104 | (void) read32(abar + 0x0c); /* Read back 2 */ |
| 105 | /* CAP2 (HBA Capabilities Extended)*/ |
| 106 | reg32 = read32(abar + 0x24); |
| 107 | reg32 &= ~0x00000002; |
| 108 | write32(abar + 0x24, reg32); |
| 109 | /* VSP (Vendor Specific Register */ |
| 110 | reg32 = read32(abar + 0xa0); |
| 111 | reg32 &= ~0x00000005; |
| 112 | write32(abar + 0xa0, reg32); |
| 113 | } else { |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 114 | /* IDE */ |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 115 | printk(BIOS_DEBUG, "SATA: Controller in plain mode.\n"); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 116 | |
Felix Singer | 192666f | 2020-04-06 10:54:42 +0200 | [diff] [blame^] | 117 | /* Without AHCI BAR no memory decoding */ |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 118 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 119 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 120 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 121 | |
| 122 | /* Native mode capable on both primary and secondary (0xa) |
| 123 | * or'ed with enabled (0x50) = 0xf |
| 124 | */ |
| 125 | pci_write_config8(dev, 0x09, 0x8f); |
| 126 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 127 | /* Set timings */ |
| 128 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 129 | IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | |
| 130 | IDE_PPE0 | IDE_IE0 | IDE_TIME0); |
| 131 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
| 132 | IDE_SITRE | IDE_ISP_3_CLOCKS | |
| 133 | IDE_RCT_1_CLOCKS | IDE_IE0 | IDE_TIME0); |
| 134 | |
| 135 | /* Sync DMA */ |
| 136 | pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0 | IDE_PSDE0); |
| 137 | pci_write_config16(dev, IDE_SDMA_TIM, 0x0201); |
| 138 | |
| 139 | /* Set IDE I/O Configuration */ |
| 140 | reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
| 141 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 142 | |
| 143 | /* Port enable */ |
| 144 | reg16 = pci_read_config16(dev, 0x92); |
| 145 | reg16 &= ~0x3f; |
| 146 | reg16 |= config->sata_port_map; |
| 147 | pci_write_config16(dev, 0x92, reg16); |
| 148 | |
| 149 | /* SATA Initialization register */ |
| 150 | pci_write_config32(dev, 0x94, |
| 151 | ((config->sata_port_map ^ 0x3f) << 24) | 0x183); |
| 152 | } |
Duncan Laurie | cfb64bd | 2012-07-16 16:16:31 -0700 | [diff] [blame] | 153 | |
| 154 | /* Set Gen3 Transmitter settings if needed */ |
| 155 | if (config->sata_port0_gen3_tx) |
| 156 | pch_iobp_update(SATA_IOBP_SP0G3IR, 0, |
| 157 | config->sata_port0_gen3_tx); |
| 158 | |
| 159 | if (config->sata_port1_gen3_tx) |
| 160 | pch_iobp_update(SATA_IOBP_SP1G3IR, 0, |
| 161 | config->sata_port1_gen3_tx); |
Stefan Reinauer | 16b022a | 2012-07-17 16:42:51 -0700 | [diff] [blame] | 162 | |
| 163 | /* Additional Programming Requirements */ |
| 164 | sir_write(dev, 0x04, 0x00001600); |
| 165 | sir_write(dev, 0x28, 0xa0000033); |
| 166 | reg32 = sir_read(dev, 0x54); |
| 167 | reg32 &= 0xff000000; |
| 168 | reg32 |= 0x5555aa; |
| 169 | sir_write(dev, 0x54, reg32); |
| 170 | sir_write(dev, 0x64, 0xcccc8484); |
| 171 | reg32 = sir_read(dev, 0x68); |
| 172 | reg32 &= 0xffff0000; |
| 173 | reg32 |= 0xcccc; |
| 174 | sir_write(dev, 0x68, reg32); |
| 175 | reg32 = sir_read(dev, 0x78); |
| 176 | reg32 &= 0x0000ffff; |
| 177 | reg32 |= 0x88880000; |
| 178 | sir_write(dev, 0x78, reg32); |
| 179 | sir_write(dev, 0x84, 0x001c7000); |
| 180 | sir_write(dev, 0x88, 0x88338822); |
| 181 | sir_write(dev, 0xa0, 0x001c7000); |
| 182 | // a4 |
| 183 | sir_write(dev, 0xc4, 0x0c0c0c0c); |
| 184 | sir_write(dev, 0xc8, 0x0c0c0c0c); |
| 185 | sir_write(dev, 0xd4, 0x10000000); |
| 186 | |
| 187 | pch_iobp_update(0xea004001, 0x3fffffff, 0xc0000000); |
| 188 | pch_iobp_update(0xea00408a, 0xfffffcff, 0x00000100); |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 189 | } |
| 190 | |
Elyes HAOUAS | 4aec340 | 2018-05-25 08:29:27 +0200 | [diff] [blame] | 191 | static void sata_enable(struct device *dev) |
Stefan Reinauer | 816d081 | 2012-04-30 16:42:07 -0700 | [diff] [blame] | 192 | { |
| 193 | /* Get the chip configuration */ |
| 194 | config_t *config = dev->chip_info; |
| 195 | u16 map = 0; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 196 | u8 sata_mode; |
Stefan Reinauer | 816d081 | 2012-04-30 16:42:07 -0700 | [diff] [blame] | 197 | |
| 198 | if (!config) |
| 199 | return; |
| 200 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 201 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 202 | sata_mode = 0; |
| 203 | |
Stefan Reinauer | 816d081 | 2012-04-30 16:42:07 -0700 | [diff] [blame] | 204 | /* |
| 205 | * Set SATA controller mode early so the resource allocator can |
| 206 | * properly assign IO/Memory resources for the controller. |
| 207 | */ |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 208 | if (sata_mode == 0) |
Stefan Reinauer | 816d081 | 2012-04-30 16:42:07 -0700 | [diff] [blame] | 209 | map = 0x0060; |
| 210 | |
| 211 | map |= (config->sata_port_map ^ 0x3f) << 8; |
| 212 | |
| 213 | pci_write_config16(dev, 0x90, map); |
| 214 | } |
| 215 | |
Aaron Durbin | aa090cb | 2017-09-13 16:01:52 -0600 | [diff] [blame] | 216 | static const char *sata_acpi_name(const struct device *dev) |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 217 | { |
| 218 | return "SATA"; |
| 219 | } |
| 220 | |
Elyes HAOUAS | 4aec340 | 2018-05-25 08:29:27 +0200 | [diff] [blame] | 221 | static void sata_fill_ssdt(struct device *dev) |
Alexander Couzens | 7bf47ee | 2015-04-16 02:00:21 +0200 | [diff] [blame] | 222 | { |
| 223 | config_t *config = dev->chip_info; |
| 224 | generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); |
| 225 | } |
| 226 | |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 227 | static struct pci_operations sata_pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 228 | .set_subsystem = pci_dev_set_subsystem, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 229 | }; |
| 230 | |
| 231 | static struct device_operations sata_ops = { |
| 232 | .read_resources = pci_dev_read_resources, |
| 233 | .set_resources = pci_dev_set_resources, |
| 234 | .enable_resources = pci_dev_enable_resources, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 235 | .acpi_fill_ssdt = sata_fill_ssdt, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 236 | .init = sata_init, |
Stefan Reinauer | 816d081 | 2012-04-30 16:42:07 -0700 | [diff] [blame] | 237 | .enable = sata_enable, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 238 | .ops_pci = &sata_pci_ops, |
Patrick Rudolph | 604f698 | 2017-06-07 09:46:52 +0200 | [diff] [blame] | 239 | .acpi_name = sata_acpi_name, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 240 | }; |
| 241 | |
Stefan Reinauer | 9a380ab | 2012-06-22 13:16:11 -0700 | [diff] [blame] | 242 | static const unsigned short pci_device_ids[] = { 0x1c00, 0x1c01, 0x1c02, 0x1c03, |
| 243 | 0x1e00, 0x1e01, 0x1e02, 0x1e03, |
| 244 | 0 }; |
| 245 | |
| 246 | static const struct pci_driver pch_sata __pci_driver = { |
| 247 | .ops = &sata_ops, |
| 248 | .vendor = PCI_VENDOR_ID_INTEL, |
| 249 | .devices = pci_device_ids, |
Stefan Reinauer | 8e07382 | 2012-04-04 00:07:22 +0200 | [diff] [blame] | 250 | }; |