blob: a51cadbee32fa3656df9fc0b8b88695a7bc06b02 [file] [log] [blame]
Patrick Georgi11f00792020-03-04 15:10:45 +01001/* SPDX-License-Identifier: GPL-2.0-only */
Martin Roth9df9e9392016-01-12 15:55:28 -07002
Aaron Durbinb21e3622016-12-07 00:32:19 -06003#include <bootstate.h>
Aaron Durbinf6ada1c2016-02-10 10:52:47 -06004#include <boot/coreboot_tables.h>
Eric Biederman8ca8d762003-04-22 19:02:15 +00005#include <console/console.h>
6#include <cpu/cpu.h>
Kyösti Mälkkice39ba92020-01-04 16:15:50 +02007#include <post.h>
Eric Biederman8ca8d762003-04-22 19:02:15 +00008#include <string.h>
Arthur Heymansd4dfc212022-11-10 13:34:49 +01009#include <cpu/x86/gdt.h>
Aaron Durbinb21e3622016-12-07 00:32:19 -060010#include <cpu/x86/mp.h>
Eric Biedermanb78c1972004-10-14 20:54:17 +000011#include <cpu/x86/lapic.h>
Aaron Durbine0969ae2016-02-10 10:56:06 -060012#include <cpu/x86/tsc.h>
Eric Biedermanb78c1972004-10-14 20:54:17 +000013#include <device/path.h>
14#include <device/device.h>
15#include <smp/spinlock.h>
Eric Biederman8ca8d762003-04-22 19:02:15 +000016
Patrick Rudolphadcf7822020-08-27 20:50:18 +020017#if ENV_X86_32
Eric Biedermanb78c1972004-10-14 20:54:17 +000018/* Standard macro to see if a specific flag is changeable */
19static inline int flag_is_changeable_p(uint32_t flag)
Eric Biederman8ca8d762003-04-22 19:02:15 +000020{
Eric Biedermanb78c1972004-10-14 20:54:17 +000021 uint32_t f1, f2;
Eric Biederman8ca8d762003-04-22 19:02:15 +000022
Eric Biedermanb78c1972004-10-14 20:54:17 +000023 asm(
24 "pushfl\n\t"
25 "pushfl\n\t"
26 "popl %0\n\t"
27 "movl %0,%1\n\t"
28 "xorl %2,%0\n\t"
29 "pushl %0\n\t"
30 "popfl\n\t"
31 "pushfl\n\t"
32 "popl %0\n\t"
33 "popfl\n\t"
34 : "=&r" (f1), "=&r" (f2)
35 : "ir" (flag));
36 return ((f1^f2) & flag) != 0;
Eric Biederman8ca8d762003-04-22 19:02:15 +000037}
38
Eric Biedermanb78c1972004-10-14 20:54:17 +000039/*
40 * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
41 * by the fact that they preserve the flags across the division of 5/2.
42 * PII and PPro exhibit this behavior too, but they have cpuid available.
43 */
Stefan Reinauer14e22772010-04-27 06:56:47 +000044
Eric Biedermanb78c1972004-10-14 20:54:17 +000045/*
46 * Perform the Cyrix 5/2 test. A Cyrix won't change
47 * the flags, while other 486 chips will.
48 */
49static inline int test_cyrix_52div(void)
50{
51 unsigned int test;
52
53 __asm__ __volatile__(
54 "sahf\n\t" /* clear flags (%eax = 0x0005) */
55 "div %b2\n\t" /* divide 5 by 2 */
56 "lahf" /* store flags into %ah */
57 : "=a" (test)
58 : "0" (5), "q" (2)
59 : "cc");
60
61 /* AH is 0x02 on Cyrix after the divide.. */
Elyes Haouas2ba796e2022-11-18 15:21:37 +010062 return (unsigned char)(test >> 8) == 0x02;
Eric Biedermanb78c1972004-10-14 20:54:17 +000063}
64
65/*
66 * Detect a NexGen CPU running without BIOS hypercode new enough
67 * to have CPUID. (Thanks to Herbert Oppmann)
68 */
Stefan Reinauer14e22772010-04-27 06:56:47 +000069
Eric Biedermanb78c1972004-10-14 20:54:17 +000070static int deep_magic_nexgen_probe(void)
71{
72 int ret;
Stefan Reinauer14e22772010-04-27 06:56:47 +000073
Eric Biedermanb78c1972004-10-14 20:54:17 +000074 __asm__ __volatile__ (
75 " movw $0x5555, %%ax\n"
76 " xorw %%dx,%%dx\n"
77 " movw $2, %%cx\n"
78 " divw %%cx\n"
79 " movl $0, %%eax\n"
80 " jnz 1f\n"
81 " movl $1, %%eax\n"
Stefan Reinauer14e22772010-04-27 06:56:47 +000082 "1:\n"
Lee Leahy024b13d2017-03-16 13:41:11 -070083 : "=a" (ret) : : "cx", "dx");
Eric Biedermanb78c1972004-10-14 20:54:17 +000084 return ret;
85}
Stefan Reinauer96938852015-06-18 01:23:48 -070086#endif
Eric Biedermanb78c1972004-10-14 20:54:17 +000087
Elyes HAOUAS777ea892016-07-29 07:40:41 +020088/* List of CPU vendor strings along with their normalized
Eric Biedermanb78c1972004-10-14 20:54:17 +000089 * id values.
90 */
91static struct {
92 int vendor;
93 const char *name;
94} x86_vendors[] = {
95 { X86_VENDOR_INTEL, "GenuineIntel", },
96 { X86_VENDOR_CYRIX, "CyrixInstead", },
Stefan Reinauer14e22772010-04-27 06:56:47 +000097 { X86_VENDOR_AMD, "AuthenticAMD", },
Eric Biedermanb78c1972004-10-14 20:54:17 +000098 { X86_VENDOR_UMC, "UMC UMC UMC ", },
99 { X86_VENDOR_NEXGEN, "NexGenDriven", },
100 { X86_VENDOR_CENTAUR, "CentaurHauls", },
Martin Rothe3690102016-01-06 15:21:02 -0700101 { X86_VENDOR_RISE, "RiseRiseRise", },
102 { X86_VENDOR_TRANSMETA, "GenuineTMx86", },
Eric Biedermanb78c1972004-10-14 20:54:17 +0000103 { X86_VENDOR_TRANSMETA, "TransmetaCPU", },
104 { X86_VENDOR_NSC, "Geode by NSC", },
105 { X86_VENDOR_SIS, "SiS SiS SiS ", },
Jinke Fan8de6cb92019-05-18 18:07:56 +0800106 { X86_VENDOR_HYGON, "HygonGenuine", },
Eric Biedermanb78c1972004-10-14 20:54:17 +0000107};
108
Elyes HAOUAS6c9737b2018-07-08 12:30:02 +0200109static const char *const x86_vendor_name[] = {
Eric Biedermanb78c1972004-10-14 20:54:17 +0000110 [X86_VENDOR_INTEL] = "Intel",
111 [X86_VENDOR_CYRIX] = "Cyrix",
112 [X86_VENDOR_AMD] = "AMD",
113 [X86_VENDOR_UMC] = "UMC",
114 [X86_VENDOR_NEXGEN] = "NexGen",
115 [X86_VENDOR_CENTAUR] = "Centaur",
116 [X86_VENDOR_RISE] = "Rise",
117 [X86_VENDOR_TRANSMETA] = "Transmeta",
118 [X86_VENDOR_NSC] = "NSC",
119 [X86_VENDOR_SIS] = "SiS",
Jinke Fan8de6cb92019-05-18 18:07:56 +0800120 [X86_VENDOR_HYGON] = "Hygon",
Eric Biedermanb78c1972004-10-14 20:54:17 +0000121};
122
123static const char *cpu_vendor_name(int vendor)
124{
125 const char *name;
Elyes HAOUAS777ea892016-07-29 07:40:41 +0200126 name = "<invalid CPU vendor>";
Patrick Georgi6b688f52021-02-12 13:49:11 +0100127 if ((vendor < ARRAY_SIZE(x86_vendor_name)) &&
Stefan Reinauer14e22772010-04-27 06:56:47 +0000128 (x86_vendor_name[vendor] != 0))
Eric Biedermanb78c1972004-10-14 20:54:17 +0000129 name = x86_vendor_name[vendor];
Eric Biedermanb78c1972004-10-14 20:54:17 +0000130 return name;
131}
132
133static void identify_cpu(struct device *cpu)
134{
135 char vendor_name[16];
Eric Biedermanb78c1972004-10-14 20:54:17 +0000136 int i;
137
138 vendor_name[0] = '\0'; /* Unset */
Eric Biedermanb78c1972004-10-14 20:54:17 +0000139
Patrick Rudolphadcf7822020-08-27 20:50:18 +0200140#if ENV_X86_32
Eric Biedermanb78c1972004-10-14 20:54:17 +0000141 /* Find the id and vendor_name */
Rudolf Marek06253cd2012-02-25 23:51:12 +0100142 if (!cpu_have_cpuid()) {
Eric Biedermanb78c1972004-10-14 20:54:17 +0000143 /* Its a 486 if we can modify the AC flag */
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700144 if (flag_is_changeable_p(X86_EFLAGS_AC))
Eric Biedermanb78c1972004-10-14 20:54:17 +0000145 cpu->device = 0x00000400; /* 486 */
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700146 else
Eric Biedermanb78c1972004-10-14 20:54:17 +0000147 cpu->device = 0x00000300; /* 386 */
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700148 if ((cpu->device == 0x00000400) && test_cyrix_52div())
Eric Biedermanb78c1972004-10-14 20:54:17 +0000149 memcpy(vendor_name, "CyrixInstead", 13);
150 /* If we ever care we can enable cpuid here */
Eric Biedermanb78c1972004-10-14 20:54:17 +0000151 /* Detect NexGen with old hypercode */
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700152 else if (deep_magic_nexgen_probe())
Eric Biedermanb78c1972004-10-14 20:54:17 +0000153 memcpy(vendor_name, "NexGenDriven", 13);
Eric Biedermanb78c1972004-10-14 20:54:17 +0000154 }
Stefan Reinauer96938852015-06-18 01:23:48 -0700155#endif
Rudolf Marek06253cd2012-02-25 23:51:12 +0100156 if (cpu_have_cpuid()) {
Stefan Reinauer4b556a12009-05-26 12:33:06 +0000157 int cpuid_level;
Eric Biedermanb78c1972004-10-14 20:54:17 +0000158 struct cpuid_result result;
159 result = cpuid(0x00000000);
Lee Leahy024b13d2017-03-16 13:41:11 -0700160 cpuid_level = result.eax;
161 vendor_name[0] = (result.ebx >> 0) & 0xff;
162 vendor_name[1] = (result.ebx >> 8) & 0xff;
163 vendor_name[2] = (result.ebx >> 16) & 0xff;
164 vendor_name[3] = (result.ebx >> 24) & 0xff;
165 vendor_name[4] = (result.edx >> 0) & 0xff;
166 vendor_name[5] = (result.edx >> 8) & 0xff;
167 vendor_name[6] = (result.edx >> 16) & 0xff;
168 vendor_name[7] = (result.edx >> 24) & 0xff;
169 vendor_name[8] = (result.ecx >> 0) & 0xff;
170 vendor_name[9] = (result.ecx >> 8) & 0xff;
Eric Biedermanb78c1972004-10-14 20:54:17 +0000171 vendor_name[10] = (result.ecx >> 16) & 0xff;
172 vendor_name[11] = (result.ecx >> 24) & 0xff;
173 vendor_name[12] = '\0';
Stefan Reinauer14e22772010-04-27 06:56:47 +0000174
Eric Biedermanb78c1972004-10-14 20:54:17 +0000175 /* Intel-defined flags: level 0x00000001 */
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700176 if (cpuid_level >= 0x00000001)
Subrata Banik53b08c32018-12-10 14:11:35 +0530177 cpu->device = cpu_get_cpuid();
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700178 else
Eric Biedermanb78c1972004-10-14 20:54:17 +0000179 /* Have CPUID level 0 only unheard of */
180 cpu->device = 0x00000400;
Eric Biedermanb78c1972004-10-14 20:54:17 +0000181 }
182 cpu->vendor = X86_VENDOR_UNKNOWN;
Elyes HAOUASdbf30672016-08-21 17:37:15 +0200183 for (i = 0; i < ARRAY_SIZE(x86_vendors); i++) {
Eric Biedermanb78c1972004-10-14 20:54:17 +0000184 if (memcmp(vendor_name, x86_vendors[i].name, 12) == 0) {
185 cpu->vendor = x86_vendors[i].vendor;
186 break;
187 }
188 }
189}
190
Stefan Reinauer6293d302012-04-03 16:07:56 -0700191struct cpu_driver *find_cpu_driver(struct device *cpu)
Eric Biedermanb78c1972004-10-14 20:54:17 +0000192{
193 struct cpu_driver *driver;
Aaron Durbin03758152015-09-03 17:23:08 -0500194 for (driver = _cpu_drivers; driver < _ecpu_drivers; driver++) {
Jonathan Neuschäfer8f06ce32017-11-20 01:56:44 +0100195 const struct cpu_device_id *id;
Stefan Reinauer6293d302012-04-03 16:07:56 -0700196 for (id = driver->id_table;
197 id->vendor != X86_VENDOR_INVALID; id++) {
Eric Biedermanb78c1972004-10-14 20:54:17 +0000198 if ((cpu->vendor == id->vendor) &&
Stefan Reinauer14e22772010-04-27 06:56:47 +0000199 (cpu->device == id->device))
Stefan Reinauer6293d302012-04-03 16:07:56 -0700200 return driver;
Lee Leahy0b5678f2017-03-16 16:01:40 -0700201 if (id->vendor == X86_VENDOR_ANY)
Gerd Hoffmanncbf30732013-05-31 09:23:26 +0200202 return driver;
Eric Biedermanb78c1972004-10-14 20:54:17 +0000203 }
204 }
Stefan Reinauer6293d302012-04-03 16:07:56 -0700205 return NULL;
206}
207
208static void set_cpu_ops(struct device *cpu)
209{
210 struct cpu_driver *driver = find_cpu_driver(cpu);
211 cpu->ops = driver ? driver->ops : NULL;
Eric Biedermanb78c1972004-10-14 20:54:17 +0000212}
213
Elyes HAOUASa5b0bc42020-02-20 20:04:29 +0100214/* Keep track of default APIC ids for SMM. */
Subrata Banik7bc90362019-05-10 11:58:37 +0530215static int cpus_default_apic_id[CONFIG_MAX_CPUS];
216
Subrata Banik7bc90362019-05-10 11:58:37 +0530217/* Function to keep track of cpu default apic_id */
218void cpu_add_map_entry(unsigned int index)
219{
220 cpus_default_apic_id[index] = initial_lapicid();
221}
222
223/* Returns default APIC id based on logical_cpu number or < 0 on failure. */
224int cpu_get_apic_id(int logical_cpu)
225{
226 if (logical_cpu >= CONFIG_MAX_CPUS || logical_cpu < 0)
227 return -1;
228
229 return cpus_default_apic_id[logical_cpu];
230}
231
Arthur Heymans6e23da22022-11-12 16:51:22 +0100232void cpu_initialize(void)
Eric Biederman8ca8d762003-04-22 19:02:15 +0000233{
234 /* Because we busy wait at the printk spinlock.
235 * It is important to keep the number of printed messages
236 * from secondary cpus to a minimum, when debugging is
237 * disabled.
238 */
Eric Biedermanb78c1972004-10-14 20:54:17 +0000239 struct device *cpu;
Sven Schnelle51676b12012-07-29 19:18:03 +0200240 struct cpu_info *info;
Yinghai Lud4b278c2006-10-04 20:46:15 +0000241 struct cpuinfo_x86 c;
Stefan Reinauer14e22772010-04-27 06:56:47 +0000242
Sven Schnelle51676b12012-07-29 19:18:03 +0200243 info = cpu_info();
Eric Biederman83b991a2003-10-11 06:20:25 +0000244
Arthur Heymans6e23da22022-11-12 16:51:22 +0100245 printk(BIOS_INFO, "Initializing CPU #%zd\n", info->index);
Kyösti Mälkkibc8c9962012-07-10 10:19:40 +0300246
Sven Schnelle51676b12012-07-29 19:18:03 +0200247 cpu = info->cpu;
Lee Leahy9c7c6f72017-03-16 11:24:09 -0700248 if (!cpu)
Elyes HAOUAS777ea892016-07-29 07:40:41 +0200249 die("CPU: missing CPU device structure");
Li-Ta Lo8cb91dc2004-03-26 18:34:48 +0000250
Damien Zammit149c4c52015-11-28 21:27:05 +1100251 if (cpu->initialized)
252 return;
253
Duncan Laurie8adf7a22013-06-10 10:34:20 -0700254 post_log_path(cpu);
255
Elyes HAOUAS777ea892016-07-29 07:40:41 +0200256 /* Find what type of CPU we are dealing with */
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000257 identify_cpu(cpu);
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000258 printk(BIOS_DEBUG, "CPU: vendor %s device %x\n",
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000259 cpu_vendor_name(cpu->vendor), cpu->device);
Li-Ta Lofd3f2d72004-05-12 16:34:46 +0000260
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000261 get_fms(&c, cpu->device);
Yinghai Lud4b278c2006-10-04 20:46:15 +0000262
Stefan Reinauer5f5436f2010-04-25 20:42:02 +0000263 printk(BIOS_DEBUG, "CPU: family %02x, model %02x, stepping %02x\n",
264 c.x86, c.x86_model, c.x86_mask);
Stefan Reinauer14e22772010-04-27 06:56:47 +0000265
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000266 /* Lookup the cpu's operations */
267 set_cpu_ops(cpu);
Yinghai Lud4b278c2006-10-04 20:46:15 +0000268
Elyes HAOUASdbf30672016-08-21 17:37:15 +0200269 if (!cpu->ops) {
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000270 /* mask out the stepping and try again */
271 cpu->device -= c.x86_mask;
Steven J. Magnanieccc3572005-09-14 13:53:45 +0000272 set_cpu_ops(cpu);
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000273 cpu->device += c.x86_mask;
Lee Leahy0b5678f2017-03-16 16:01:40 -0700274 if (!cpu->ops)
275 die("Unknown cpu");
Elyes HAOUAS777ea892016-07-29 07:40:41 +0200276 printk(BIOS_DEBUG, "Using generic CPU ops (good)\n");
Ronald G. Minnich43225bc2005-11-22 00:07:02 +0000277 }
Stefan Reinauer14e22772010-04-27 06:56:47 +0000278
Elyes HAOUAS777ea892016-07-29 07:40:41 +0200279 /* Initialize the CPU */
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000280 if (cpu->ops && cpu->ops->init) {
281 cpu->enabled = 1;
282 cpu->initialized = 1;
283 cpu->ops->init(cpu);
284 }
Duncan Laurie8adf7a22013-06-10 10:34:20 -0700285 post_log_clear();
Yinghai Lu30b4abe2007-04-06 19:57:42 +0000286
Arthur Heymans6e23da22022-11-12 16:51:22 +0100287 printk(BIOS_INFO, "CPU #%zd initialized\n", info->index);
Eric Biederman8ca8d762003-04-22 19:02:15 +0000288}
Aaron Durbinf6ada1c2016-02-10 10:52:47 -0600289
290void lb_arch_add_records(struct lb_header *header)
291{
Aaron Durbine0969ae2016-02-10 10:56:06 -0600292 uint32_t freq_khz;
293 struct lb_tsc_info *tsc_info;
294
295 /* Don't advertise a TSC rate unless it's constant. */
Kyösti Mälkki0d6ddf82019-10-31 14:52:20 +0200296 if (!tsc_constant_rate())
Aaron Durbine0969ae2016-02-10 10:56:06 -0600297 return;
298
299 freq_khz = tsc_freq_mhz() * 1000;
300
301 /* No use exposing a TSC frequency that is zero. */
302 if (freq_khz == 0)
303 return;
304
305 tsc_info = (void *)lb_new_record(header);
306 tsc_info->tag = LB_TAG_TSC_INFO;
307 tsc_info->size = sizeof(*tsc_info);
308 tsc_info->freq_khz = freq_khz;
Aaron Durbinf6ada1c2016-02-10 10:52:47 -0600309}
Aaron Durbinb21e3622016-12-07 00:32:19 -0600310
311void arch_bootstate_coreboot_exit(void)
312{
313 /* APs are already parked by existing infrastructure. */
Julius Wernercd49cce2019-03-05 16:53:33 -0800314 if (!CONFIG(PARALLEL_MP_AP_WORK))
Aaron Durbinb21e3622016-12-07 00:32:19 -0600315 return;
316
317 /* APs are waiting for work. Last thing to do is park them. */
Furquan Shaikhd6630d12018-03-29 00:10:02 -0700318 mp_park_aps();
Aaron Durbinb21e3622016-12-07 00:32:19 -0600319}
Subrata Banik095c9312019-05-06 19:51:34 +0530320
Arthur Heymansd4dfc212022-11-10 13:34:49 +0100321/* cpu_info() looks at address 0 at the base of %gs for a pointer to struct cpu_info */
322static struct per_cpu_segment_data segment_data[CONFIG_MAX_CPUS];
Arthur Heymanscc226072022-11-12 18:51:04 +0100323struct cpu_info cpu_infos[CONFIG_MAX_CPUS];
Arthur Heymansd4dfc212022-11-10 13:34:49 +0100324
325enum cb_err set_cpu_info(unsigned int index, struct device *cpu)
326{
327 if (index >= ARRAY_SIZE(cpu_infos))
328 return CB_ERR;
329
330 if (!cpu)
331 return CB_ERR;
332
333 const struct cpu_info info = { .cpu = cpu, .index = index};
334 cpu_infos[index] = info;
335 segment_data[index].cpu_info = &cpu_infos[index];
336
337 struct segment_descriptor {
338 uint16_t segment_limit_0_15;
339 uint16_t base_address_0_15;
340 uint8_t base_address_16_23;
341 uint8_t attrs[2];
342 uint8_t base_address_24_31;
343 } *segment_descriptor = (void *)&per_cpu_segment_descriptors;
344
345 segment_descriptor[index].base_address_0_15 = (uintptr_t)&segment_data[index] & 0xffff;
346 segment_descriptor[index].base_address_16_23 = ((uintptr_t)&segment_data[index] >> 16) & 0xff;
347 segment_descriptor[index].base_address_24_31 = ((uintptr_t)&segment_data[index] >> 24) & 0xff;
348
349 const unsigned int cpu_segment = per_cpu_segment_selector + (index << 3);
350
351 __asm__ __volatile__ ("mov %0, %%gs\n"
352 :
353 : "r" (cpu_segment)
354 : );
355
356 return CB_SUCCESS;
357}