Angel Pons | bbc99cf | 2020-04-04 18:51:23 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 2 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 3 | #include <device/mmio.h> |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 4 | #include <soc/addressmap.h> |
| 5 | #include <soc/clock.h> |
| 6 | #include <soc/edp.h> |
| 7 | #include <soc/vop.h> |
| 8 | |
Shunqian Zheng | fb53329 | 2016-05-02 21:38:00 +0800 | [diff] [blame] | 9 | static struct rockchip_vop_regs * const vop_regs[] = { |
| 10 | (struct rockchip_vop_regs *)VOP_BIG_BASE, |
| 11 | (struct rockchip_vop_regs *)VOP_LIT_BASE |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 12 | }; |
| 13 | |
Lin Huang | 152e675 | 2016-10-20 14:22:11 -0700 | [diff] [blame] | 14 | void rkvop_enable(u32 vop_id, u32 fbbase) |
| 15 | { |
| 16 | struct rockchip_vop_regs *preg = vop_regs[vop_id]; |
| 17 | |
| 18 | write32(&preg->win0_yrgb_mst, fbbase); |
| 19 | |
| 20 | /* On RK3288, the reg_cfg_done[1:31] is reserved and read-only, |
| 21 | * but it's fine to write to it |
| 22 | */ |
| 23 | write32(&preg->reg_cfg_done, 0xffff); /* enable reg config */ |
| 24 | } |
| 25 | |
| 26 | void rkvop_prepare(u32 vop_id, const struct edid *edid) |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 27 | { |
| 28 | u32 lb_mode; |
| 29 | u32 rgb_mode; |
David Hendricks | 7dbf9c6 | 2015-07-30 18:49:48 -0700 | [diff] [blame] | 30 | u32 hactive = edid->mode.ha; |
| 31 | u32 vactive = edid->mode.va; |
| 32 | u32 hsync_len = edid->mode.hspw; |
| 33 | u32 hback_porch = edid->mode.hbl - edid->mode.hso - edid->mode.hspw; |
| 34 | u32 vsync_len = edid->mode.vspw; |
| 35 | u32 vback_porch = edid->mode.vbl - edid->mode.vso - edid->mode.vspw; |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 36 | u32 xpos = 0, ypos = 0; |
Shunqian Zheng | fb53329 | 2016-05-02 21:38:00 +0800 | [diff] [blame] | 37 | struct rockchip_vop_regs *preg = vop_regs[vop_id]; |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 38 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 39 | write32(&preg->win0_act_info, |
| 40 | V_ACT_WIDTH(hactive - 1) | V_ACT_HEIGHT(vactive - 1)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 41 | |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 42 | write32(&preg->win0_dsp_st, V_DSP_XST(xpos + hsync_len + hback_porch) | |
| 43 | V_DSP_YST(ypos + vsync_len + vback_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 44 | |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 45 | write32(&preg->win0_dsp_info, V_DSP_WIDTH(hactive - 1) | |
| 46 | V_DSP_HEIGHT(vactive - 1)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 47 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 48 | clrsetbits32(&preg->win0_color_key, M_WIN0_KEY_EN | M_WIN0_KEY_COLOR, |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 49 | V_WIN0_KEY_EN(0) | |
| 50 | V_WIN0_KEY_COLOR(0)); |
| 51 | |
| 52 | switch (edid->framebuffer_bits_per_pixel) { |
| 53 | case 16: |
| 54 | rgb_mode = RGB565; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 55 | write32(&preg->win0_vir, V_RGB565_VIRWIDTH(hactive)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 56 | break; |
| 57 | case 24: |
| 58 | rgb_mode = RGB888; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 59 | write32(&preg->win0_vir, V_RGB888_VIRWIDTH(hactive)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 60 | break; |
| 61 | case 32: |
| 62 | default: |
| 63 | rgb_mode = ARGB8888; |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 64 | write32(&preg->win0_vir, V_ARGB888_VIRWIDTH(hactive)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 65 | break; |
| 66 | } |
| 67 | |
| 68 | if (hactive > 2560) |
| 69 | lb_mode = LB_RGB_3840X2; |
| 70 | else if (hactive > 1920) |
| 71 | lb_mode = LB_RGB_2560X4; |
| 72 | else if (hactive > 1280) |
| 73 | lb_mode = LB_RGB_1920X5; |
| 74 | else |
| 75 | lb_mode = LB_RGB_1280X8; |
| 76 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 77 | clrsetbits32(&preg->win0_ctrl0, |
| 78 | M_WIN0_LB_MODE | M_WIN0_DATA_FMT | M_WIN0_EN, |
| 79 | V_WIN0_LB_MODE(lb_mode) | |
| 80 | V_WIN0_DATA_FMT(rgb_mode) | V_WIN0_EN(1)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 81 | } |
| 82 | |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 83 | void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode) |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 84 | { |
David Hendricks | 7dbf9c6 | 2015-07-30 18:49:48 -0700 | [diff] [blame] | 85 | u32 hactive = edid->mode.ha; |
| 86 | u32 vactive = edid->mode.va; |
| 87 | u32 hfront_porch = edid->mode.hso; |
| 88 | u32 hsync_len = edid->mode.hspw; |
| 89 | u32 hback_porch = edid->mode.hbl - edid->mode.hso - edid->mode.hspw; |
| 90 | u32 vfront_porch = edid->mode.vso; |
| 91 | u32 vsync_len = edid->mode.vspw; |
| 92 | u32 vback_porch = edid->mode.vbl - edid->mode.vso - edid->mode.vspw; |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 93 | u32 dsp_out_mode; |
Shunqian Zheng | fb53329 | 2016-05-02 21:38:00 +0800 | [diff] [blame] | 94 | struct rockchip_vop_regs *preg = vop_regs[vop_id]; |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 95 | |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 96 | switch (mode) { |
| 97 | |
David Hendricks | af42f06 | 2015-06-17 13:47:28 -0700 | [diff] [blame] | 98 | case VOP_MODE_HDMI: |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 99 | clrsetbits32(&preg->sys_ctrl, |
| 100 | M_ALL_OUT_EN, V_HDMI_OUT_EN(1)); |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 101 | dsp_out_mode = 15; |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 102 | break; |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 103 | case VOP_MODE_MIPI: |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 104 | clrsetbits32(&preg->sys_ctrl, M_ALL_OUT_EN, |
| 105 | V_MIPI_OUT_EN(1)); |
Lin Huang | 25fb09b | 2017-11-22 09:40:50 +0800 | [diff] [blame] | 106 | dsp_out_mode = 0; |
| 107 | break; |
| 108 | case VOP_MODE_DUAL_MIPI: |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 109 | clrsetbits32(&preg->sys_ctrl, M_ALL_OUT_EN, |
| 110 | V_MIPI_OUT_EN(1) | V_DUAL_MIPI_EN(1)); |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 111 | dsp_out_mode = 0; |
| 112 | break; |
David Hendricks | af42f06 | 2015-06-17 13:47:28 -0700 | [diff] [blame] | 113 | case VOP_MODE_EDP: |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 114 | default: |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 115 | clrsetbits32(&preg->sys_ctrl, |
| 116 | M_ALL_OUT_EN, V_EDP_OUT_EN(1)); |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 117 | dsp_out_mode = 15; |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 118 | break; |
| 119 | } |
Nickey Yang | fe122d4 | 2017-04-27 09:38:06 +0800 | [diff] [blame] | 120 | |
Julius Werner | 55009af | 2019-12-02 22:03:27 -0800 | [diff] [blame] | 121 | clrsetbits32(&preg->dsp_ctrl0, |
| 122 | M_DSP_OUT_MODE | M_DSP_VSYNC_POL | |
| 123 | M_DSP_HSYNC_POL, |
| 124 | V_DSP_OUT_MODE(dsp_out_mode) | |
| 125 | V_DSP_HSYNC_POL(edid->mode.phsync == '+') | |
| 126 | V_DSP_VSYNC_POL(edid->mode.pvsync == '+')); |
Yakir Yang | 68f42be | 2015-04-29 10:08:12 -0500 | [diff] [blame] | 127 | |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 128 | write32(&preg->dsp_htotal_hs_end, V_HSYNC(hsync_len) | |
| 129 | V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 130 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 131 | write32(&preg->dsp_hact_st_end, |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 132 | V_HEAP(hsync_len + hback_porch + hactive) | |
| 133 | V_HASP(hsync_len + hback_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 134 | |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 135 | write32(&preg->dsp_vtotal_vs_end, V_VSYNC(vsync_len) | |
| 136 | V_VERPRD(vsync_len + vback_porch + vactive + vfront_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 137 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 138 | write32(&preg->dsp_vact_st_end, |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 139 | V_VAEP(vsync_len + vback_porch + vactive) | |
| 140 | V_VASP(vsync_len + vback_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 141 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 142 | write32(&preg->post_dsp_hact_info, |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 143 | V_HEAP(hsync_len + hback_porch + hactive) | |
| 144 | V_HASP(hsync_len + hback_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 145 | |
Julius Werner | 2f37bd6 | 2015-02-19 14:51:15 -0800 | [diff] [blame] | 146 | write32(&preg->post_dsp_vact_info, |
Julius Werner | 9418476 | 2015-02-19 20:19:23 -0800 | [diff] [blame] | 147 | V_VAEP(vsync_len + vback_porch + vactive) | |
| 148 | V_VASP(vsync_len + vback_porch)); |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 149 | |
Shunqian Zheng | fb53329 | 2016-05-02 21:38:00 +0800 | [diff] [blame] | 150 | /* On RK3288, the reg_cfg_done[1:31] is reserved and read-only, |
| 151 | * but it's fine to write to it |
| 152 | */ |
| 153 | write32(&preg->reg_cfg_done, 0xffff); /* enable reg config */ |
huang lin | 40f558e | 2014-09-19 14:51:52 +0800 | [diff] [blame] | 154 | } |