blob: d375f46483a1760b4025f3521eb205c7e8ec4233 [file] [log] [blame]
Julius Werner7a757c92014-09-10 19:37:15 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <assert.h>
David Hendricks3c4951e2015-01-12 14:08:10 -080021#include <bcd.h>
Julius Werner7a757c92014-09-10 19:37:15 -070022#include <console/console.h>
Julius Werner7a453eb2014-10-20 13:14:55 -070023#include <delay.h>
Julius Werner7a757c92014-09-10 19:37:15 -070024#include <device/i2c.h>
David Hendricks3c4951e2015-01-12 14:08:10 -080025#include <rtc.h>
Julius Werner7a453eb2014-10-20 13:14:55 -070026#include <soc/rk808.h>
Julius Werner7a757c92014-09-10 19:37:15 -070027#include <stdint.h>
28#include <stdlib.h>
Julius Werner7a757c92014-09-10 19:37:15 -070029
David Hendricks4d244212015-01-12 13:13:30 -080030#if CONFIG_PMIC_BUS < 0
31#error "PMIC_BUS must be set in mainboard's Kconfig."
32#endif
Julius Werner7a757c92014-09-10 19:37:15 -070033
David Hendricks4d244212015-01-12 13:13:30 -080034#define RK808_ADDR 0x1b
Julius Werner7a757c92014-09-10 19:37:15 -070035
David Hendricks4d244212015-01-12 13:13:30 -080036#define DCDC_EN 0x23
37#define LDO_EN 0x24
38#define BUCK1SEL 0x2f
39#define BUCK4SEL 0x38
40#define LDO_ONSEL(i) (0x39 + 2 * i)
41#define LDO_SLPSEL(i) (0x3a + 2 * i)
42
David Hendricks3c4951e2015-01-12 14:08:10 -080043#define RTC_SECOND 0x00
44#define RTC_MINUTE 0x01
45#define RTC_HOUR 0x02
46#define RTC_DAY 0x03
47#define RTC_MONTH 0x04
48#define RTC_YEAR 0x05
49#define RTC_WEEKS 0x06
50#define RTC_CTRL 0x10
51#define RTC_STATUS 0x11
52
53#define RTC_CTRL_STOP_RTC (1 << 0)
54#define RTC_CTRL_GET_TIME (1 << 6)
55#define RTC_CTRL_RTC_READSEL (1 << 7)
56
huang lin75f431a2015-01-23 14:48:42 +080057#define DCDC_ILMAX 0x90
58
David Hendricks4d244212015-01-12 13:13:30 -080059static int rk808_read(uint8_t reg, uint8_t *value)
60{
61 return i2c_readb(CONFIG_PMIC_BUS, RK808_ADDR, reg, value);
62}
63
64static int rk808_write(uint8_t reg, uint8_t value)
65{
66 return i2c_writeb(CONFIG_PMIC_BUS, RK808_ADDR, reg, value);
67}
68
69static void rk808_clrsetbits(uint8_t reg, uint8_t clr, uint8_t set)
Julius Werner7a757c92014-09-10 19:37:15 -070070{
71 uint8_t value;
72
David Hendricks4d244212015-01-12 13:13:30 -080073 if (rk808_read(reg, &value) || rk808_write(reg, (value & ~clr) | set))
Julius Werner7a757c92014-09-10 19:37:15 -070074 printk(BIOS_ERR, "ERROR: Cannot set Rk808[%#x]!\n", reg);
75}
76
David Hendricks4d244212015-01-12 13:13:30 -080077void rk808_configure_switch(int sw, int enabled)
Julius Werner8f3883d2014-09-26 21:01:08 -070078{
79 assert(sw == 1 || sw == 2);
David Hendricks4d244212015-01-12 13:13:30 -080080 rk808_clrsetbits(DCDC_EN, 1 << (sw + 4), !!enabled << (sw + 4));
Julius Werner8f3883d2014-09-26 21:01:08 -070081}
82
David Hendricks4d244212015-01-12 13:13:30 -080083void rk808_configure_ldo(int ldo, int millivolts)
Julius Werner7a757c92014-09-10 19:37:15 -070084{
85 uint8_t vsel;
86
Julius Wernerdbfa9d52014-12-05 17:29:42 -080087 if (!millivolts) {
David Hendricks4d244212015-01-12 13:13:30 -080088 rk808_clrsetbits(LDO_EN, 1 << (ldo - 1), 0);
Julius Wernerdbfa9d52014-12-05 17:29:42 -080089 return;
90 }
91
Julius Werner7a757c92014-09-10 19:37:15 -070092 switch (ldo) {
93 case 1:
94 case 2:
95 case 4:
96 case 5:
97 case 8:
huang lin08884e32014-10-10 20:28:47 -070098 vsel = div_round_up(millivolts, 100) - 18;
Julius Werneref639b22014-11-06 14:33:12 -080099 assert(vsel <= 0x10);
Julius Werner7a757c92014-09-10 19:37:15 -0700100 break;
101 case 3:
102 case 6:
103 case 7:
huang lin08884e32014-10-10 20:28:47 -0700104 vsel = div_round_up(millivolts, 100) - 8;
Julius Werneref639b22014-11-06 14:33:12 -0800105 assert(vsel <= 0x11);
Julius Werner7a757c92014-09-10 19:37:15 -0700106 break;
107 default:
108 die("Unknown LDO index!");
109 }
Julius Werner7a757c92014-09-10 19:37:15 -0700110
David Hendricks4d244212015-01-12 13:13:30 -0800111 rk808_clrsetbits(LDO_ONSEL(ldo), 0x1f, vsel);
112 rk808_clrsetbits(LDO_EN, 0, 1 << (ldo - 1));
Julius Werner7a757c92014-09-10 19:37:15 -0700113}
huang lin08884e32014-10-10 20:28:47 -0700114
David Hendricks4d244212015-01-12 13:13:30 -0800115void rk808_configure_buck(int buck, int millivolts)
huang lin08884e32014-10-10 20:28:47 -0700116{
117 uint8_t vsel;
118 uint8_t buck_reg;
119
120 switch (buck) {
121 case 1:
122 case 2:
huang lin75f431a2015-01-23 14:48:42 +0800123 /* 25mV steps. base = 29 * 25mV = 725 */
huang lin08884e32014-10-10 20:28:47 -0700124 vsel = (div_round_up(millivolts, 25) - 29) * 2 + 1;
125 assert(vsel <= 0x3f);
126 buck_reg = BUCK1SEL + 4 * (buck - 1);
127 break;
128 case 4:
129 vsel = div_round_up(millivolts, 100) - 18;
130 assert(vsel <= 0xf);
131 buck_reg = BUCK4SEL;
132 break;
133 default:
huang lin75f431a2015-01-23 14:48:42 +0800134 die("Unknown buck index!");
huang lin08884e32014-10-10 20:28:47 -0700135 }
huang lin75f431a2015-01-23 14:48:42 +0800136 rk808_clrsetbits(DCDC_ILMAX, 0, 3 << ((buck - 1) * 2));
David Hendricks4d244212015-01-12 13:13:30 -0800137 rk808_clrsetbits(buck_reg, 0x3f, vsel);
138 rk808_clrsetbits(DCDC_EN, 0, 1 << (buck - 1));
huang lin08884e32014-10-10 20:28:47 -0700139}
David Hendricks3c4951e2015-01-12 14:08:10 -0800140
141static void rk808rtc_stop(void)
142{
143 rk808_clrsetbits(RTC_CTRL, RTC_CTRL_STOP_RTC, 0);
144}
145
146static void rk808rtc_start(void)
147{
148 rk808_clrsetbits(RTC_CTRL, 0, RTC_CTRL_STOP_RTC);
149}
150
151int rtc_set(const struct rtc_time *time)
152{
153 int ret = 0;
154
155 /* RTC time can only be set when RTC is frozen */
156 rk808rtc_stop();
157
158 ret |= rk808_write(RTC_SECOND, bin2bcd(time->sec));
159 ret |= rk808_write(RTC_MINUTE, bin2bcd(time->min));
160 ret |= rk808_write(RTC_HOUR, bin2bcd(time->hour));
161 ret |= rk808_write(RTC_DAY, bin2bcd(time->mday));
162 ret |= rk808_write(RTC_MONTH, bin2bcd(time->mon));
163 ret |= rk808_write(RTC_YEAR, bin2bcd(time->year));
164
165 rk808rtc_start();
166 return ret;
167}
168
169int rtc_get(struct rtc_time *time)
170{
171 uint8_t value;
172 int ret = 0;
173
174 /*
175 * Set RTC_READSEL to cause reads to access shadow registers and
176 * transition GET_TIME from 0 to 1 to cause dynamic register content
177 * to be copied into shadow registers. This ensures a coherent reading
178 * of time values as we access each register using slow I2C transfers.
179 */
180 rk808_clrsetbits(RTC_CTRL, RTC_CTRL_GET_TIME, 0);
181 rk808_clrsetbits(RTC_CTRL, 0, RTC_CTRL_GET_TIME | RTC_CTRL_RTC_READSEL);
182
183 ret |= rk808_read(RTC_SECOND, &value);
184 time->sec = bcd2bin(value & 0x7f);
185
186 ret |= rk808_read(RTC_MINUTE, &value);
187 time->min = bcd2bin(value & 0x7f);
188
189 ret |= rk808_read(RTC_HOUR, &value);
190 time->hour = bcd2bin(value & 0x3f);
191
192 ret |= rk808_read(RTC_DAY, &value);
193 time->mday = bcd2bin(value & 0x3f);
194
195 ret |= rk808_read(RTC_MONTH, &value);
196 time->mon = bcd2bin(value & 0x1f);
197
198 ret |= rk808_read(RTC_YEAR, &value);
199 time->year = bcd2bin(value);
200
201 return ret;
202}