blob: 48cfa8603e7926a12380626f58deebec89fe20f2 [file] [log] [blame]
Julius Werner7a757c92014-09-10 19:37:15 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <assert.h>
21#include <console/console.h>
22#include <device/i2c.h>
23#include <stdint.h>
24#include <stdlib.h>
huang lin08884e32014-10-10 20:28:47 -070025#include <delay.h>
Julius Werner7a757c92014-09-10 19:37:15 -070026#include "rk808.h"
27
28#define RK808_ADDR 0x1b
29
Julius Werner8f3883d2014-09-26 21:01:08 -070030#define DCDC_EN 0x23
Julius Werner7a757c92014-09-10 19:37:15 -070031#define LDO_EN 0x24
huang lin08884e32014-10-10 20:28:47 -070032#define BUCK1SEL 0x2f
33#define BUCK4SEL 0x38
Julius Werner7a757c92014-09-10 19:37:15 -070034#define LDO_ONSEL(i) (0x39 + 2 * i)
35#define LDO_SLPSEL(i) (0x3a + 2 * i)
36
37static void rk808_clrsetbits(uint8_t bus, uint8_t reg, uint8_t clr, uint8_t set)
38{
39 uint8_t value;
40
41 if (i2c_readb(bus, RK808_ADDR, reg, &value) ||
42 i2c_writeb(bus, RK808_ADDR, reg, (value & ~clr) | set))
43 printk(BIOS_ERR, "ERROR: Cannot set Rk808[%#x]!\n", reg);
44}
45
Julius Werner8f3883d2014-09-26 21:01:08 -070046void rk808_configure_switch(uint8_t bus, int sw, int enabled)
47{
48 assert(sw == 1 || sw == 2);
49 rk808_clrsetbits(bus, DCDC_EN, 1 << (sw + 4), !!enabled << (sw + 4));
50}
51
Julius Werner7a757c92014-09-10 19:37:15 -070052void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
53{
54 uint8_t vsel;
55
56 switch (ldo) {
57 case 1:
58 case 2:
59 case 4:
60 case 5:
61 case 8:
huang lin08884e32014-10-10 20:28:47 -070062 vsel = div_round_up(millivolts, 100) - 18;
Julius Werner7a757c92014-09-10 19:37:15 -070063 break;
64 case 3:
65 case 6:
66 case 7:
huang lin08884e32014-10-10 20:28:47 -070067 vsel = div_round_up(millivolts, 100) - 8;
Julius Werner7a757c92014-09-10 19:37:15 -070068 break;
69 default:
70 die("Unknown LDO index!");
71 }
72 assert(vsel <= 0x10);
73
74 rk808_clrsetbits(bus, LDO_ONSEL(ldo), 0x1f, vsel);
75 rk808_clrsetbits(bus, LDO_EN, 0, 1 << (ldo - 1));
76}
huang lin08884e32014-10-10 20:28:47 -070077
78void rk808_configure_buck(uint8_t bus, int buck, int millivolts)
79{
80 uint8_t vsel;
81 uint8_t buck_reg;
82
83 switch (buck) {
84 case 1:
85 case 2:
86 /*base on 725mv, use 25mv step */
87 vsel = (div_round_up(millivolts, 25) - 29) * 2 + 1;
88 assert(vsel <= 0x3f);
89 buck_reg = BUCK1SEL + 4 * (buck - 1);
90 break;
91 case 4:
92 vsel = div_round_up(millivolts, 100) - 18;
93 assert(vsel <= 0xf);
94 buck_reg = BUCK4SEL;
95 break;
96 default:
97 die("fault buck index!");
98 }
99 rk808_clrsetbits(bus, buck_reg, 0x3f, vsel);
100 rk808_clrsetbits(bus, DCDC_EN, 0, 1 << (buck - 1));
101 udelay(225);/* Must wait for voltage to stabilize */
102}