Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 1 | #ifndef CPU_AMD_MTRR_H |
| 2 | #define CPU_AMD_MTRR_H |
| 3 | |
| 4 | #define IORR_FIRST 0xC0010016 |
| 5 | #define IORR_LAST 0xC0010019 |
| 6 | |
| 7 | #define MTRR_READ_MEM (1 << 4) |
| 8 | #define MTRR_WRITE_MEM (1 << 3) |
| 9 | |
| 10 | #define SYSCFG_MSR 0xC0010010 |
Scott Duplichan | f3cce2f | 2010-11-13 19:07:59 +0000 | [diff] [blame] | 11 | #define SYSCFG_MSR_TOM2WB (1 << 22) |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 12 | #define SYSCFG_MSR_TOM2En (1 << 21) |
| 13 | #define SYSCFG_MSR_MtrrVarDramEn (1 << 20) |
| 14 | #define SYSCFG_MSR_MtrrFixDramModEn (1 << 19) |
| 15 | #define SYSCFG_MSR_MtrrFixDramEn (1 << 18) |
| 16 | #define SYSCFG_MSR_UcLockEn (1 << 17) |
| 17 | #define SYSCFG_MSR_ChxToDirtyDis (1 << 16) |
| 18 | #define SYSCFG_MSR_ClVicBlkEn (1 << 11) |
| 19 | #define SYSCFG_MSR_SetDirtyEnO (1 << 10) |
| 20 | #define SYSCFG_MSR_SetDirtyEnS (1 << 9) |
| 21 | #define SYSCFG_MSR_SetDirtyEnE (1 << 8) |
| 22 | #define SYSCFG_MSR_SysVicLimitMask ((1 << 8) - (1 << 5)) |
| 23 | #define SYSCFG_MSR_SysAckLimitMask ((1 << 5) - (1 << 0)) |
| 24 | |
Warren Turkal | 4ffde94 | 2010-10-12 06:13:40 +0000 | [diff] [blame] | 25 | #define IORRBase_MSR(reg) (0xC0010016 + 2 * (reg)) |
| 26 | #define IORRMask_MSR(reg) (0xC0010016 + 2 * (reg) + 1) |
| 27 | |
Kyösti Mälkki | 0127c6c | 2015-03-05 14:35:04 +0200 | [diff] [blame] | 28 | #if defined(__ASSEMBLER__) |
| 29 | #define TOP_MEM 0xC001001A |
| 30 | #define TOP_MEM2 0xC001001D |
| 31 | #else |
| 32 | #define TOP_MEM 0xC001001Aul |
| 33 | #define TOP_MEM2 0xC001001Dul |
efdesign98 | 78834b7 | 2011-08-04 16:18:16 -0600 | [diff] [blame] | 34 | #endif |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 35 | |
| 36 | #define TOP_MEM_MASK 0x007fffff |
| 37 | #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) |
| 38 | |
Stefan Reinauer | 61aee5f | 2011-04-10 04:15:23 +0000 | [diff] [blame] | 39 | #if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__) |
Kyösti Mälkki | 4607cac | 2016-12-06 14:14:19 +0200 | [diff] [blame] | 40 | |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame^] | 41 | #include <compiler.h> |
Kyösti Mälkki | 4607cac | 2016-12-06 14:14:19 +0200 | [diff] [blame] | 42 | #include <cpu/x86/msr.h> |
| 43 | |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 44 | void amd_setup_mtrrs(void); |
Kyösti Mälkki | 17bb225 | 2017-04-19 19:55:54 +0300 | [diff] [blame] | 45 | struct device; |
| 46 | void add_uma_resource_below_tolm(struct device *nb, int idx); |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame] | 47 | |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame^] | 48 | static __always_inline msr_t rdmsr_amd(unsigned int index) |
Kyösti Mälkki | 190011e | 2013-03-25 12:48:49 +0200 | [diff] [blame] | 49 | { |
| 50 | msr_t result; |
| 51 | __asm__ __volatile__ ( |
| 52 | "rdmsr" |
| 53 | : "=a" (result.lo), "=d" (result.hi) |
| 54 | : "c"(index), "D"(0x9c5a203a) |
| 55 | ); |
| 56 | return result; |
| 57 | } |
| 58 | |
Aaron Durbin | 75a62e7 | 2018-09-13 02:10:45 -0600 | [diff] [blame^] | 59 | static __always_inline void wrmsr_amd(unsigned int index, msr_t msr) |
Kyösti Mälkki | 190011e | 2013-03-25 12:48:49 +0200 | [diff] [blame] | 60 | { |
| 61 | __asm__ __volatile__ ( |
| 62 | "wrmsr" |
| 63 | : /* No outputs */ |
| 64 | : "c" (index), "a" (msr.lo), "d" (msr.hi), "D" (0x9c5a203a) |
| 65 | ); |
| 66 | } |
| 67 | |
Kyösti Mälkki | dbc4739 | 2012-08-05 12:11:40 +0300 | [diff] [blame] | 68 | /* To distribute topmem MSRs to APs. */ |
| 69 | void setup_bsp_ramtop(void); |
| 70 | uint64_t bsp_topmem(void); |
| 71 | uint64_t bsp_topmem2(void); |
Stefan Reinauer | 35b6bbb | 2010-03-28 21:26:54 +0000 | [diff] [blame] | 72 | #endif |
Eric Biederman | c84c190 | 2004-10-14 20:13:01 +0000 | [diff] [blame] | 73 | |
| 74 | #endif /* CPU_AMD_MTRR_H */ |