Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2010 Wang Qing Pei <wangqingpei@gmail.com> |
| 5 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <console/console.h> |
| 18 | #include <device/device.h> |
| 19 | #include <device/pci.h> |
| 20 | #include <arch/io.h> |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 21 | #include <cpu/x86/msr.h> |
| 22 | #include <cpu/amd/mtrr.h> |
| 23 | #include <device/pci_def.h> |
efdesign98 | 00c8c4a | 2011-07-20 12:37:58 -0600 | [diff] [blame] | 24 | #include "southbridge/amd/sb700/sb700.h" |
| 25 | #include "southbridge/amd/sb700/smbus.h" |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 26 | |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 27 | void set_pcie_dereset(void); |
| 28 | void set_pcie_reset(void); |
Wang Qing Pei | d6c4395 | 2010-08-18 01:55:11 +0000 | [diff] [blame] | 29 | u8 is_dev3_present(void); |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 30 | |
| 31 | /* |
| 32 | * the board uses GPIO 6 as PCIe slot reset, GPIO4 as GFX slot reset. We need to |
| 33 | * pull it up before training the slot. |
| 34 | ***/ |
| 35 | void set_pcie_dereset() |
| 36 | { |
| 37 | u16 word; |
| 38 | device_t sm_dev; |
| 39 | /* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */ |
| 40 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 41 | |
| 42 | word = pci_read_config16(sm_dev, 0xA8); |
| 43 | word |= (1 << 0) | (1 << 2); /* Set Gpio6,4 as output */ |
| 44 | word &= ~((1 << 8) | (1 << 10)); |
| 45 | pci_write_config16(sm_dev, 0xA8, word); |
| 46 | } |
| 47 | |
| 48 | void set_pcie_reset() |
| 49 | { |
| 50 | u16 word; |
| 51 | device_t sm_dev; |
| 52 | /* GPIO 6 reset PCIe slot, GPIO 4 reset GFX PCIe */ |
| 53 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 54 | |
| 55 | word = pci_read_config16(sm_dev, 0xA8); |
| 56 | word &= ~((1 << 0) | (1 << 2)); /* Set Gpio6,4 as output */ |
| 57 | word &= ~((1 << 8) | (1 << 10)); |
| 58 | pci_write_config16(sm_dev, 0xA8, word); |
| 59 | } |
| 60 | |
| 61 | #if 0 /* not tested yet. */ |
| 62 | /******************************************************** |
| 63 | * board uses SB700 GPIO9 to detect IDE_DMA66. |
| 64 | * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to |
| 65 | * get the cable type, 40 pin or 80 pin? |
| 66 | ********************************************************/ |
| 67 | static void get_ide_dma66(void) |
| 68 | { |
| 69 | u8 byte; |
| 70 | /*u32 sm_dev, ide_dev; */ |
| 71 | device_t sm_dev, ide_dev; |
| 72 | |
| 73 | sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0)); |
| 74 | |
| 75 | byte = pci_read_config8(sm_dev, 0xA9); |
| 76 | byte |= (1 << 5); /* Set Gpio9 as input */ |
| 77 | pci_write_config8(sm_dev, 0xA9, byte); |
| 78 | |
| 79 | ide_dev = dev_find_slot(0, PCI_DEVFN(0x14, 1)); |
| 80 | byte = pci_read_config8(ide_dev, 0x56); |
| 81 | byte &= ~(7 << 0); |
| 82 | if ((1 << 5) & pci_read_config8(sm_dev, 0xAA)) |
| 83 | byte |= 2 << 0; /* mode 2 */ |
| 84 | else |
| 85 | byte |= 5 << 0; /* mode 5 */ |
| 86 | pci_write_config8(ide_dev, 0x56, byte); |
| 87 | } |
| 88 | #endif /* get_ide_dma66() */ |
| 89 | |
Wang Qing Pei | d6c4395 | 2010-08-18 01:55:11 +0000 | [diff] [blame] | 90 | u8 is_dev3_present(void) |
| 91 | { |
| 92 | return 0; |
| 93 | } |
| 94 | |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 95 | /************************************************* |
| 96 | * enable the dedicated function in this board. |
| 97 | * This function called early than rs780_enable. |
| 98 | *************************************************/ |
Paul Menzel | 528640d | 2013-02-23 21:31:23 +0100 | [diff] [blame] | 99 | static void mainboard_enable(device_t dev) |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 100 | { |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 101 | printk(BIOS_INFO, "Mainboard PA78VM5 Enable. dev=0x%p\n", dev); |
| 102 | |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 103 | set_pcie_dereset(); |
| 104 | /* get_ide_dma66(); */ |
| 105 | } |
| 106 | |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 107 | struct chip_operations mainboard_ops = { |
Paul Menzel | 528640d | 2013-02-23 21:31:23 +0100 | [diff] [blame] | 108 | .enable_dev = mainboard_enable, |
Wang Qing Pei | 0ede4c0 | 2010-08-17 15:19:32 +0000 | [diff] [blame] | 109 | }; |