Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
| 5 | #include <device/pci.h> |
| 6 | #include <device/pci_ids.h> |
| 7 | #include <device/pci_ops.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 8 | #include <device/mmio.h> |
Vladimir Serbinenko | 75c8387 | 2014-09-05 01:01:31 +0200 | [diff] [blame] | 9 | #include <device/azalia_device.h> |
Elyes HAOUAS | bf0970e | 2019-03-21 11:10:03 +0100 | [diff] [blame] | 10 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 11 | #include "pch.h" |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 12 | #include "hda_verb.h" |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 13 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 14 | static void azalia_pch_init(struct device *dev, u8 *base) |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 15 | { |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 16 | u8 reg8; |
| 17 | u16 reg16; |
| 18 | u32 reg32; |
| 19 | |
Angel Pons | 8963f7d | 2020-10-24 12:20:28 +0200 | [diff] [blame] | 20 | if (RCBA32(0x2030) & (1 << 31)) { |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 21 | reg32 = pci_read_config32(dev, 0x120); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 22 | reg32 &= 0xf8ffff01; |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 23 | reg32 |= (1 << 25); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 24 | reg32 |= RCBA32(0x2030) & 0xfe; |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 25 | pci_write_config32(dev, 0x120, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 26 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 27 | if (!pch_is_lp()) { |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 28 | pci_and_config16(dev, 0x78, ~(1 << 11)); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 29 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 30 | } else |
| 31 | printk(BIOS_DEBUG, "Azalia: V1CTL disabled.\n"); |
| 32 | |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 33 | reg32 = pci_read_config32(dev, 0x114); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 34 | reg32 &= ~0xfe; |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 35 | pci_write_config32(dev, 0x114, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 36 | |
| 37 | // Set VCi enable bit |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 38 | if (pci_read_config32(dev, 0x120) & ((1 << 24) | (1 << 25) | (1 << 26))) { |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 39 | reg32 = pci_read_config32(dev, 0x120); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 40 | if (pch_is_lp()) |
Angel Pons | 8963f7d | 2020-10-24 12:20:28 +0200 | [diff] [blame] | 41 | reg32 &= ~(1 << 31); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 42 | else |
Angel Pons | 8963f7d | 2020-10-24 12:20:28 +0200 | [diff] [blame] | 43 | reg32 |= (1 << 31); |
Kyösti Mälkki | 386b3e6 | 2013-07-26 08:52:49 +0300 | [diff] [blame] | 44 | pci_write_config32(dev, 0x120, reg32); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 45 | } |
| 46 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 47 | reg8 = pci_read_config8(dev, 0x43); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 48 | if (pch_is_lp()) |
| 49 | reg8 &= ~(1 << 6); |
| 50 | else |
| 51 | reg8 |= (1 << 4); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 52 | pci_write_config8(dev, 0x43, reg8); |
| 53 | |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 54 | if (!pch_is_lp()) |
| 55 | pci_or_config32(dev, 0xc0, 1 << 17); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 56 | |
| 57 | /* Additional programming steps */ |
| 58 | reg32 = pci_read_config32(dev, 0xc4); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 59 | if (pch_is_lp()) |
| 60 | reg32 |= (1 << 24); |
| 61 | else |
| 62 | reg32 |= (1 << 14); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 63 | pci_write_config32(dev, 0xc4, reg32); |
| 64 | |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 65 | if (!pch_is_lp()) |
Angel Pons | 8963f7d | 2020-10-24 12:20:28 +0200 | [diff] [blame] | 66 | pci_and_config32(dev, 0xd0, ~(1 << 31)); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 67 | |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 68 | // Docking not supported |
| 69 | pci_and_config8(dev, 0x4d, (u8)~(1 << 7)); // Docking Status |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 70 | |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 71 | if (pch_is_lp()) { |
| 72 | reg16 = read32(base + 0x0012); |
| 73 | reg16 |= (1 << 0); |
| 74 | write32(base + 0x0012, reg16); |
| 75 | |
| 76 | /* disable Auto Voltage Detector */ |
Angel Pons | bf9bc50 | 2020-06-08 00:12:43 +0200 | [diff] [blame] | 77 | pci_or_config8(dev, 0x42, 1 << 2); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 78 | } |
| 79 | } |
| 80 | |
| 81 | static void azalia_init(struct device *dev) |
| 82 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 83 | u8 *base; |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 84 | struct resource *res; |
| 85 | u32 codec_mask; |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 86 | |
| 87 | /* Find base address */ |
Angel Pons | f32ae10 | 2021-11-03 13:07:14 +0100 | [diff] [blame] | 88 | res = probe_resource(dev, PCI_BASE_ADDRESS_0); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 89 | if (!res) |
| 90 | return; |
| 91 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 92 | base = res2mmio(res, 0, 0); |
| 93 | printk(BIOS_DEBUG, "Azalia: base = %p\n", base); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 94 | |
| 95 | /* Set Bus Master */ |
Elyes HAOUAS | 73ae076 | 2020-04-28 10:13:05 +0200 | [diff] [blame] | 96 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Duncan Laurie | 0a7c49e | 2013-06-20 12:40:55 -0700 | [diff] [blame] | 97 | |
| 98 | azalia_pch_init(dev, base); |
| 99 | |
| 100 | codec_mask = hda_codec_detect(base); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 101 | |
| 102 | if (codec_mask) { |
| 103 | printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); |
Angel Pons | 4f8aea0 | 2021-11-10 18:09:04 +0100 | [diff] [blame] | 104 | azalia_codecs_init(base, codec_mask); |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 105 | } |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 106 | } |
| 107 | |
Angel Pons | c1301dd | 2021-03-18 20:35:19 +0100 | [diff] [blame] | 108 | static void azalia_final(struct device *dev) |
| 109 | { |
| 110 | /* Set HDCFG.BCLD */ |
| 111 | pci_or_config16(dev, 0x40, 1 << 1); |
| 112 | } |
| 113 | |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 114 | static struct device_operations azalia_ops = { |
| 115 | .read_resources = pci_dev_read_resources, |
| 116 | .set_resources = pci_dev_set_resources, |
| 117 | .enable_resources = pci_dev_enable_resources, |
| 118 | .init = azalia_init, |
Angel Pons | c1301dd | 2021-03-18 20:35:19 +0100 | [diff] [blame] | 119 | .final = azalia_final, |
Angel Pons | 1fc0edd | 2020-05-31 00:03:28 +0200 | [diff] [blame] | 120 | .ops_pci = &pci_dev_ops_pci, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 121 | }; |
| 122 | |
Felix Singer | 4ea08f9 | 2020-11-20 12:56:44 +0000 | [diff] [blame] | 123 | static const unsigned short pci_device_ids[] = { |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 124 | PCI_DID_INTEL_LPT_H_AUDIO, |
Angel Pons | 434d7d4 | 2022-10-07 00:36:00 +0200 | [diff] [blame] | 125 | PCI_DID_INTEL_LPT_H_AUDIO_9, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 126 | PCI_DID_INTEL_LPT_LP_AUDIO, |
Felix Singer | 4ea08f9 | 2020-11-20 12:56:44 +0000 | [diff] [blame] | 127 | 0 |
| 128 | }; |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 129 | |
| 130 | static const struct pci_driver pch_azalia __pci_driver = { |
| 131 | .ops = &azalia_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 132 | .vendor = PCI_VID_INTEL, |
Aaron Durbin | 76c3700 | 2012-10-30 09:03:43 -0500 | [diff] [blame] | 133 | .devices = pci_device_ids, |
| 134 | }; |